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參數(shù)資料
| 型號： | X95840WV20IZ-2.7 |
| 廠商： | INTERSIL CORP |
| 元件分類： | 數(shù)字電位計(jì) |
| 英文描述： | Quad Digital Controlled Potentiometers |
| 中文描述： | QUAD 10K DIGITAL POTENTIOMETER, 2-WIRE SERIAL CONTROL INTERFACE, 256 POSITIONS, PDSO20 |
| 封裝： | ROHS COMPLIANT, PLASTIC, TSSOP-20 |
| 文件頁數(shù)： | 12/13頁 |
| 文件大?。?/td> | 1145K |
| 代理商： | X95840WV20IZ-2.7 |
12
FN8213.1
September 27, 2005
STOP condition) following the last bit of the last Data Byte
(See Figure 18).
The Data Bytes are from the memory location indicated by
an internal pointer. This pointer initial value is determined by
the Address Byte in the Read operation instruction, and
increments by one during transmission of each Data Byte.
After reaching the memory location 01Fh (8 decimal) the
pointer “rolls over” to 00h, and the device continues to output
data for each ACK received.
The byte at address 00001000 bin (8 decimal) determines if
the Data Bytes being read are from volatile or non-volatile
memory. See “Memory Description” on page 9.
Signals
from the
Master
Signals from the
Slave
Signal at SDA
S
t
a
r
t
Identification
Byte
with
R/W=0
Address
Byte
A
C
K
A
C
K
1
0
1
0
0
S
t
o
p
A
C
K
1
1
1
0
0
Identification
Byte
with
R/W=1
A
C
K
S
t
a
r
t
Last Read Data
Byte
First Read Data
Byte
A
C
K
FIGURE 18. READ SEQUENCE
X95840
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