參數(shù)資料
型號(hào)： X9521V20I
廠商： INTERSIL CORP
元件分類： 數(shù)字電位計(jì)
英文描述： Fiber Channel/Gigabit Ethernet Laser Diode Control for Fiber Optic Modules
中文描述： DUAL 100K DIGITAL POTENTIOMETER, 2-WIRE SERIAL CONTROL INTERFACE, 256 POSITIONS, PDSO20
封裝： PLASTIC, TSSOP-20
文件頁(yè)數(shù)： 12/26頁(yè)
文件大小： 434K
代理商： X9521V20I
REV 1.1.9 1/30/03
Characteristics subject to change without notice.
12 of 26
www.xicor.com
X9521
– Preliminary Information
ter now responds with an ACKNOWLEDGE, indicating it
requires additional data. The X9521 continues to output a
Data Byte for each ACKNOWLEDGE received. The mas-
ter terminates the read operation by not responding with
an ACKNOWLEDGE and instead issuing a STOP condi-
tion.
The data output is sequential, with the data from address
n followed by the data from address n + 1. The address
counter for read operations increments through the entire
memory contents to be serially read during one operation.
At the end of the address space the counter “rolls over” to
address 00h and the device continues to output data for
each ACKNOWLEDGE received (Refer to Figure 16.).
CONTROL AND STATUS REGISTER
The Control and Status (CONSTAT) Register provides the
user with a mechanism for changing and reading the sta-
tus of various parameters of the X9521 (See Figure 17).
The CONSTAT register is a combination of both volatile
and nonvolatile bits. The nonvolatile bits of the CONSTAT
register retain their stored values even when Vcc is pow-
ered down, then powered back up. The volatile bits how-
ever, will always power up to a known logic state “0”
(irrespective of their value at power down).
A detailed description of the function of each of the CON-
STAT register bits follows:
WEL: Write Enable Latch (Volatile)
The WEL bit controls the Write Enable status of the entire
X9521 device. This bit must first be enabled before ANY
write operation (to DCPs, EEPROM memory array, or the
CONSTAT register). If the WEL bit is not first enabled,
then ANY proceeding (volatile or nonvolatile) write opera-
tion to DCPs, EEPROM array, as well as the CONSTAT
register, is aborted and no ACKNOWLEDGE is issued
after a Data Byte.
The WEL bit is a volatile latch that powers up in the dis-
abled, LOW (0) state. The WEL bit is enabled / set by writ-
ing 00000010 to the CONSTAT register. Once enabled,
the WEL bit remains set to “1” until either it is reset to “0”
(by writing 00000000 to the CONSTAT register) or until
the X9521 powers down, and then up again.
Writes to the WEL bit do not cause an internal high volt-
age write cycle. Therefore, the device is ready for another
operation immediately after a STOP condition is executed
in the CONSTAT Write command sequence (See Figure
18).
RWEL: Register Write Enable Latch (Volatile)
The RWEL bit controls the (CONSTAT) Register Write
Enable status of the X9521. Therefore, in order to write to
any of the bits of the CONSTAT Register (except WEL),
the RWEL bit must first be set to “1”. The RWEL bit is a
volatile bit that powers up in the disabled, LOW (“0”) state.
It must be noted that the RWEL bit can only be set, once
the WEL bit has first been enabled (See "CONSTAT Reg-
ister Write Operation").
The RWEL bit will reset itself to the default “0” state, in
one of three cases:
—After a successful write operation to any bits of the
CONSTAT register has been completed (See Figure
18).
—When the X9521 is powered down.
—When attempting to write to a Block Lock protected
region of the EEPROM memory (See "BL1, BL0: Block
Lock protection bits - (Nonvolatile)", below).
BL1, BL0: Block Lock protection bits - (Nonvolatile)
The Block Lock protection bits (BL1 and BL0) are used to:
—Inhibit a write operation from being performed to certain
addresses of the EEPROM memory array
—Inhibit a DCP write operation (changing the “wiper posi-
tion”).
Bit(s)
Description
CS7 - CS5
Always “0”(RESERVED)
BL1 - BL0
Sets the Block Lock partition
RWEL
Register Write Enable Latch bit
WEL
Write Enable Latch bit
CS0
Always “0” (RESERVED)
0
WEL
0
CS5
CS6
CS7
CS4
CS3
CS2
CS1
CS0
0
0
BL0
BL1
RWEL
Figure 17. CONSTAT Register Format
NV
NV
NOTE: Bits labelled NV are nonvolatile (See “CONTROL AND STATUS REGISTER”).
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X9521V20I-A 功能描述:IC DCP DUAL EEPROM MEM 20-TSSOP RoHS:否 類別:集成電路 (IC) >> PMIC - 激光驅(qū)動(dòng)器 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:60 系列:- 類型:激光二極管驅(qū)動(dòng)器 數(shù)據(jù)速率:- 通道數(shù):4 電源電壓:3.3V 電流 - 電源:- 電流 - 調(diào)制:- 電流 - 偏置:- 工作溫度:0°C ~ 70°C 封裝/外殼:40-TQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:40-TQFN EP 包裝:托盤 安裝類型:表面貼裝
X9521V20I-B 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Dual DCP, EEPROM Memory
X9521V20IZ-A 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Dual DCP, EEPROM Memory
X9521V20IZ-B 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Dual DCP, EEPROM Memory
X9522 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Laser Diode Control for Fiber Optic Modules
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