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參數(shù)資料
| 型號： | X9521 |
| 廠商： | Intersil Corporation |
| 英文描述： | Fiber Channel/Gigabit Ethernet Laser Diode Control for Fiber Optic Modules |
| 中文描述： | 光纖通道/千兆以太網(wǎng)控制半導(dǎo)體激光器光纖模塊 |
| 文件頁數(shù)： | 7/26頁 |
| 文件大?。?/td> | 434K |
| 代理商： | X9521 |
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REV 1.1.9 1/30/03
Characteristics subject to change without notice.
7 of 26
www.xicor.com
X9521
– Preliminary Information
and NVM. Therefore, the new “wiper position” setting is
recalled into the WCR after Vcc of the X9521 has been
powered down then powered back up
If WT is “0” then a DCP Volatile Write is performed. This
operation changes the DCP “wiper position” by writing
new data to the associated WCR only. The contents of the
associated NVM register remains unchanged. Therefore,
when Vcc to the device is powered down then back up,
the “wiper position” reverts to that last written to the DCP
using a nonvolatile write operation.
DCP Write Operation
A write to DCPx (x=1,2) can be performed using the three
byte command sequence shown in Figure 9.
In order to perform a write operation on a particular DCP
the Write Enable Latch (WEL) bit of the CONSTAT Regis-
ter must first be set (See “BL1, BL0: Block Lock protection
bits - (Nonvolatile)” on page 12.)
The Slave Address Byte 10101110 specifies that a Write
to a DCP is to be conducted. An ACKNOWLEDGE is
returned by the X9521 after the Slave Address, if it has
been received correctly.
Next, an Instruction Byte is issued on SDA. Bits P1 and
P0 of the Instruction Byte determine which WCR is to be
written, while the WT bit determines if the Write is to be
volatile or nonvolatile. If the Instruction Byte format is
valid, another ACKNOWLEDGE is then returned by the
X9521.
Following the Instruction Byte, a Data Byte is issued to the
X9521 over SDA. The Data Byte contents is latched into
the WCR of the DCP on the first rising edge of the clock
signal, after the LSB of the Data Byte (D0) has been
issued on SDA (See Figure 25).
The Data Byte determines the “wiper position” (which
FET switch of the DCP resistive array is switched ON) of
the DCP The maximum value for the Data Byte depends
upon which DCP is being addressed (see Table below).
Using a Data Byte larger than the values specified above
results in the “wiper terminal” being set to the highest tap
position. The “wiper position” does NOT roll-over to the
lowest tap position.
For DCP2 (256 Tap), the Data Byte maps one to one to
the “wiper position” of the DCP “wiper terminal”. There-
fore, the Data Byte 00001111 (15
10
) corresponds to set-
ting the “wiper terminal” to tap position 15. Similarly, the
Data Byte 00011100 (28
10
) corresponds to setting the
WT
Description
0
Select a Volatile Write operation to be performed
on the DCP pointed to by bits P1 and P0
1
Select a Nonvolatile Write operation to be per-
formed on the DCP pointed to by bits P1 and P0
0
0
WT
0
0
0
P1
P0
WRITE TYPE
DCP SELECT
This bit has no effect when a Read operation is being performed.
I5
I6
I7
I4
I3
I2
I1
I0
Figure 8.
Instruction Byte Format
S
T
A
R
T
1
0
1
0
1
1
1
0
A
C
K
WT
0
0
0
0
0
P1 P0
A
C
K
S
T
O
P
A
C
K
D7
D6
D5
D4
D3
D2
D1
D0
SLAVE ADDRESS BYTE
INSTRUCTION BYTE
DATA BYTE
Figure 9.
DCP Write Command Sequence
P1- P0
DCPx
# Taps
Max. Data Byte
0
0
Reserved
0
1
x=1
100
Refer to Appendix 1
1
0
x=2
256
FFh
1
1
Reserved
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| X9521_06 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Dual DCP, EEPROM Memory |
| X9521V20I | 功能描述:IC LASR CTRLR 2CHAN 5.5V 20TSSOP RoHS:否 類別:集成電路 (IC) >> PMIC - 激光驅(qū)動器 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:60 系列:- 類型:激光二極管驅(qū)動器 數(shù)據(jù)速率:- 通道數(shù):4 電源電壓:3.3V 電流 - 電源:- 電流 - 調(diào)制:- 電流 - 偏置:- 工作溫度:0°C ~ 70°C 封裝/外殼:40-TQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:40-TQFN EP 包裝:托盤 安裝類型:表面貼裝 |
| X9521V20I-A | 功能描述:IC DCP DUAL EEPROM MEM 20-TSSOP RoHS:否 類別:集成電路 (IC) >> PMIC - 激光驅(qū)動器 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:60 系列:- 類型:激光二極管驅(qū)動器 數(shù)據(jù)速率:- 通道數(shù):4 電源電壓:3.3V 電流 - 電源:- 電流 - 調(diào)制:- 電流 - 偏置:- 工作溫度:0°C ~ 70°C 封裝/外殼:40-TQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:40-TQFN EP 包裝:托盤 安裝類型:表面貼裝 |
| X9521V20I-B | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Dual DCP, EEPROM Memory |
| X9521V20IZ-A | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Dual DCP, EEPROM Memory |
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