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參數(shù)資料
| 型號： | X9430WS24-2.7 |
| 廠商： | INTERSIL CORP |
| 元件分類： | 數(shù)字電位計 |
| 英文描述： | Dual Digitally Controlled Potentiometer (XDCP) with Operational Amplifier |
| 中文描述： | DUAL 10K DIGITAL POTENTIOMETER, 3-WIRE SERIAL CONTROL INTERFACE, 64 POSITIONS, PDSO24 |
| 封裝： | PLASTIC, SOIC-24 |
| 文件頁數(shù)： | 8/21頁 |
| 文件大小： | 881K |
| 代理商： | X9430WS24-2.7 |
X9430 – Preliminary Information
Characteristics subject to change without notice.
8 of 21
REV 1.0 6/20/00
www.xicor.com
REGISTER DESCRIPTIONS AND MEMORY MAP
Memory Map
Wiper Counter Register (WCR)
0
0
WP5
WP0-WP5 identify wiper position.
Data Registers (DR, R0-R3)
WCRO
DR0
DR1
DR2
DR3
WCR1
DR0
DR1
DR2
DR3
WP4
(volatile)
WP3
WP2
WP1
WP0
(LSB)
Wiper Position or User Data
(Nonvolatile)
Instruction Format
Notes:
(1) “A1 ~ A0”: stands for the device addresses sent by the master.
(2) WPx refers to wiper position data in the Wiper Counter Register
(3) “I”: stands for the increment operation, SI held HIGH during active SCK phase (high).
(4) “D”: stands for the decrement operation, SI held LOW during active SCK phase (high).
Read Wiper Counter Register (WCR)
Read the contents of the Wiper Counter Register pointed to by P
1
-P
0
device type
identifier
addresses
Write Wiper Counter Register (WCR)
Write new value to the Wiper Counter Register pointed to by P
1
-P
0
device type
identifier
addresses
Read Data Register (DR)
Read the contents of the Register pointed to by P
1
-P
0
and R
1
-R
0
device type
identifier
addresses
Write Data Register (DR)
Write new value to the Register pointed to by P
1
-P
0
and R
1
-R
0
device type
identifier
addresses
CS
Falling
Edge
device
instruction
opcode
WCR
addresses
wiper position
(sent by X9430 on SO)
W
P
5
4
CS
Rising
Edge
0
1
0
1
0
0
A
1
A
0
1
0
0
1
0
0
0
P
0
0
0
W
P
W
P
3
W
P
2
W
P
1
W
P
0
CS
Falling
Edge
device
instruction
opcode
WCR
addresses
Data Byte
(sent by Host on SI)
W
P
5
4
CS
Rising
Edge
0
1
0
1
0
0
A
1
A
0
1
0
1
0
0
0
0
P
0
0
0
W
P
W
P
3
W
P
2
W
P
1
W
P
0
CS
Falling
Edge
device
instruction
opcode
DR/WCR
addresses
Data Byte
(sent by X9430 on SO)
W
P
5
4
CS
Rising
Edge
0
1
0
1
0
0
A
1
A
0
1
0
1
1
R
1
R
0
0
P
0
0
0
W
P
W
P
3
W
P
2
W
P
1
W
P
0
CS
Falling
Edge
device
instruction
opcode
DR/WCR
addresses
Data Byte
(sent by host on SI)
W
P
5
4
CS
Rising
Edge
HIGH-VOLTAGE
WRITE CYCLE
0 1 0 1 0 0
A
1
A
0
1 1 0 0
R
1
R
0
0
P
0
0 0
W
P
W
P
3
W
P
2
W
P
1
W
P
0
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