參數(shù)資料
型號(hào): X9315WSZ-2.7
廠商: Intersil
文件頁(yè)數(shù): 8/16頁(yè)
文件大?。?/td> 0K
描述: IC XDCP 32-TAP 10K 3WIRE 8-SOIC
標(biāo)準(zhǔn)包裝: 100
系列: XDCP™
接片: 32
電阻(歐姆): 10k
電路數(shù): 1
溫度系數(shù): 標(biāo)準(zhǔn)值 ±300 ppm/°C
存儲(chǔ)器類(lèi)型: 非易失
接口: 3 線串行(芯片選擇,遞增,增/減)
電源電壓: 2.7 V ~ 5.5 V
工作溫度: 0°C ~ 70°C
安裝類(lèi)型: 表面貼裝
封裝/外殼: 8-SOIC(0.154",3.90mm 寬)
供應(yīng)商設(shè)備封裝: 8-SOIC
包裝: 管件
16
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
FN8179.2
December 21, 2009
X9315
Small Outline Plastic Packages (SOIC)
INDEX
AREA
E
D
N
12
3
-B-
0.25(0.010)
C A
M
BS
e
-A-
L
B
M
-C-
A1
A
SEATING PLANE
0.10(0.004)
h x 45°
C
H
0.25(0.010)
B
M
α
NOTES:
1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of
Publication Number 95.
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Dimension “D” does not include mold flash, protrusions or gate burrs.
Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006
inch) per side.
4. Dimension “E” does not include interlead flash or protrusions. Inter-
lead flash and protrusions shall not exceed 0.25mm (0.010 inch) per
side.
5. The chamfer on the body is optional. If it is not present, a visual index
feature must be located within the crosshatched area.
6. “L” is the length of terminal for soldering to a substrate.
7. “N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. The lead width “B”, as measured 0.36mm (0.014 inch) or greater
above the seating plane, shall not exceed a maximum value of
0.61mm (0.024 inch).
10. Controlling dimension: MILLIMETER. Converted inch dimensions
are not necessarily exact.
M8.15 (JEDEC MS-012-AA ISSUE C)
8 LEAD NARROW BODY SMALL OUTLINE PLASTIC PACKAGE
SYMBOL
INCHES
MILLIMETERS
NOTES
MIN
MAX
MIN
MAX
A
0.0532
0.0688
1.35
1.75
-
A1
0.0040
0.0098
0.10
0.25
-
B
0.013
0.020
0.33
0.51
9
C
0.0075
0.0098
0.19
0.25
-
D
0.1890
0.1968
4.80
5.00
3
E
0.1497
0.1574
3.80
4.00
4
e
0.050 BSC
1.27 BSC
-
H
0.2284
0.2440
5.80
6.20
-
h
0.0099
0.0196
0.25
0.50
5
L
0.016
0.050
0.40
1.27
6
N8
8
7
α
-
Rev. 1 6/05
相關(guān)PDF資料
PDF描述
DS1013M-150+ IC DELAY LINE 150NS 8-DIP
MS3452L22-19S CONN RCPT 14POS BOX MNT W/SCKT
X9313ZSZ-3 IC XDCP 32-TAP 1K 3-WIRE 8-SOIC
DS1013M-20+ IC DELAY LINE 20NS 8-DIP
X9313WSZ-3 IC XDCP 32-TAP 10K 3-WIRE 8-SOIC
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
X9315WSZT1 功能描述:IC XDCP 32-TAP 10K 3WIRE 8-SOIC RoHS:是 類(lèi)別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)字電位器 系列:XDCP™ 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:2,500 系列:- 接片:256 電阻(歐姆):100k 電路數(shù):2 溫度系數(shù):標(biāo)準(zhǔn)值 35 ppm/°C 存儲(chǔ)器類(lèi)型:易失 接口:6 線串行(芯片選擇,遞增,增/減) 電源電壓:2.6 V ~ 5.5 V 工作溫度:-40°C ~ 125°C 安裝類(lèi)型:表面貼裝 封裝/外殼:14-TSSOP(0.173",4.40mm 寬) 供應(yīng)商設(shè)備封裝:14-TSSOP 包裝:帶卷 (TR)
X9315Z 制造商:XICOR 制造商全稱:Xicor Inc. 功能描述:E 2 POT TM Nonvolatile Digital Potentiometer
X9315ZM 制造商:XICOR 制造商全稱:Xicor Inc. 功能描述:E 2 POT TM Nonvolatile Digital Potentiometer
X9315ZM-2.7 制造商:XICOR 制造商全稱:Xicor Inc. 功能描述:E 2 POT TM Nonvolatile Digital Potentiometer
X9315ZMI 制造商:XICOR 制造商全稱:Xicor Inc. 功能描述:E 2 POT TM Nonvolatile Digital Potentiometer