參數(shù)資料
型號(hào): X9315WSZ-2.7
廠商: Intersil
文件頁數(shù): 14/16頁
文件大?。?/td> 0K
描述: IC XDCP 32-TAP 10K 3WIRE 8-SOIC
標(biāo)準(zhǔn)包裝: 100
系列: XDCP™
接片: 32
電阻(歐姆): 10k
電路數(shù): 1
溫度系數(shù): 標(biāo)準(zhǔn)值 ±300 ppm/°C
存儲(chǔ)器類型: 非易失
接口: 3 線串行(芯片選擇,遞增,增/減)
電源電壓: 2.7 V ~ 5.5 V
工作溫度: 0°C ~ 70°C
安裝類型: 表面貼裝
封裝/外殼: 8-SOIC(0.154",3.90mm 寬)
供應(yīng)商設(shè)備封裝: 8-SOIC
包裝: 管件
7
FN8179.2
December 21, 2009
DC Electrical Specifications
(Over recommended operating conditions unless otherwise specified.
SYMBOL
PARAMETER
TEST CONDITIONS
LIMITS
UNIT
MIN
(Note 9)
TYP
(Note 8)
MAX
(Note 9)
VCC
Supply Voltage
X9315
4.5
5.5
V
X9315-2.7
2.7
5.5
V
ICC1
VCC active current (Increment)
CS = VIL, U/D = VIL or VIH and INC = 0.4V
@ max. tCYC
80
A
ICC2
VCC active current (Store) (EEPROM
Store)
CS = VIH, U/D = VIL or VIH and INC = VIH @
max. tWR
400
A
ISB
Standby supply current
CS = VCC - 0.3V, U/D and INC = VSS or VCC
- 0.3V
5A
ILI
CS, INC, U/D input leakage current
VIN = VSS to VCC
-10
+10
A
VIH
CS, INC, U/D input HIGH voltage
VCC x 0.7
VCC + 0.5
V
VIL
CS, INC, U/D input LOW voltage
-0.5
VCC x 0.1
V
CIN
CS, INC, U/D input capacitance
VCC = 5V, VIN = VSS, TA = +25°C, f = 1MHz
10
pF
Endurance and Data Retention
PARAMETER
MIN
UNIT
Minimum endurance
100,000
Data changes per bit
Data retention
100
Years
Test Circuit #1
Test Circuit #2
Circuit #3 SPICE Macro Model
Test Point
VW/RW
VH/RH
VL/RL
VS
Force
Current
VL
VW
Test Point
VH/RH
VW/RW
VL/RL
CH
CL
RW
10pF
RH
RL
RTOTAL
CW
25pF
AC Conditions of Test
Input pulse levels
0V to 3V
Input rise and fall times
10ns
Input reference levels
1.5V
AC Electrical Specifications
(Over recommended operating conditions unless otherwise specified)
SYMBOL
PARAMETER
LIMITS
UNIT
MIN
(Note 9)
TYP
(Note 8)
MAX
(Note 9)
tCl
CS to INC setup
100
ns
tlD
INC HIGH to U/D change
100
ns
tDI
U/D to INC setup
2.9
s
tlL
INC LOW period
1
s
tlH
INC HIGH period
1
s
X9315
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