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參數(shù)資料
| 型號： | X84256S825 |
| 英文描述： | Serial EEPROM |
| 中文描述： | 串行EEPROM |
| 文件頁數(shù)： | 2/13頁 |
| 文件大?。?/td> | 145K |
| 代理商： | X84256S825 |
X84256
Characteristics subject to change without notice.
2 of 13
REV 1.1 11/22/00
www.xicor.com
PIN CONFIGURATIONS
Drawings are to the same scale, actual package sizes
are shown in inches:
PIN NAMES
PIN DESCRIPTIONS
Chip Enable (CE)
The Chip Enable input must be LOW to enable all read/
write operations. When CE is HIGH, the chip is dese-
lected, the I/O pin is in the high impedance state, and
unless a nonvolatile write operation is underway, the
device is in the standby power mode.
Output Enable (OE)
The Output Enable input must be LOW to enable the
output buffer and to read data from the device on the I/O
line.
Write Enable (WE)
The Write Enable input must be LOW to write either
data or command sequences to the device.
Data In/Data Out (I/O)
Data and command sequences are serially written to
or serially read from the device through the I/O pin.
Write Protect (WP)
When the Write Protect input is LOW, nonvolatile writes
to the device are disabled. When WP is HIGH, all func-
tions, including nonvolatile writes, operate normally. If a
nonvolatile write cycle is in progress, WP going LOW
will have no effect on the cycle already underway, but
will inhibit any additional nonvolatile write cycles.
DEVICE OPERATION
The X84256 serial EEPROM is designed to interface
directly with most microprocessor buses. Standard CE,
OE, and WE signals control the read and write opera-
tions, and a single l/O line is used to send and receive
data and commands serially.
Data Timing
Data input on the l/O line is latched on the rising edge
of either WE or CE, whichever occurs first. Data output
on the l/O line is active whenever both OE and CE are
LOW. Care should be taken to ensure that WE and OE
are never both LOW while CE is LOW.
Pin
I/O
CE
OE
WE
WP
V
CC
V
SS
NC
Description
Data Input/Output
Chip Enable Input
Output Enable Input
Write Enable Input
Write Protect Input
Supply Voltage
Ground
No Connect
8-Lead XBGA
I/O
CE
V
SS
WP
V
CC
NC
WE
OE
1
2
3
4
8
7
6
5
14-Lead TSSOP
NC
NC
WP
1
2
3
4
5
7
6
X8401
V
SS
NC
NC
NC
OE
WE
NC
8
9
10
11
12
14
13
8-Lead SOIC
V
CC
NC
OE
WE
CE
I/O
WP
1
2
3
4
6
5
7
8
V
SS
CE
I/O
V
CC
NC
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| X84256V1425 | Serial EEPROM |
| X86-64 | x86-64 - Advanced Micro Devices. Inc. x86-64TM Technology White Paper |
| X88064 | E2 Micro-Peripheral |
| X88064P | E2 Micro-Peripheral |
| X88064P-60 | E2 Micro-Peripheral |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| X84256S8I | 制造商:XICOR 制造商全稱:Xicor Inc. 功能描述:UPort Saver EEPROM |
| X84256S8I-1.8 | 制造商:XICOR 制造商全稱:Xicor Inc. 功能描述:UPort Saver EEPROM |
| X84256S8I-2.5 | 制造商:XICOR 制造商全稱:Xicor Inc. 功能描述:UPort Saver EEPROM |
| X84256V14 | 制造商:XICOR 制造商全稱:Xicor Inc. 功能描述:UPort Saver EEPROM |
| X84256V14-1.8 | 制造商:XICOR 制造商全稱:Xicor Inc. 功能描述:UPort Saver EEPROM |
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