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參數(shù)資料
| 型號： | X84256V1425 |
| 英文描述： | Serial EEPROM |
| 中文描述： | 串行EEPROM |
| 文件頁數(shù)： | 1/13頁 |
| 文件大?。?/td> | 145K |
| 代理商： | X84256V1425 |
REV 1.1 11/22/00
Characteristics subject to change without notice.
1 of 13
www.xicor.com
256K
X84256
MPS
EEPROM
μPort Saver EEPROM
FEATURES
10MHz data transfer rate
30ns read access time
Direct interface to microprocessors and micro-
controllers
—Eliminates I/O port requirements
—No interface glue logic required
—Eliminates need for parallel to serial converters
Low power CMOS
—2.5V–3.6V
—Standby current less than 1μA
—Active current less than 3mA
Byte or page write capable
—64-byte page write mode
Typical nonvolatile write cycle time: 2ms
High reliability
—1,000,000 endurance cycles
—Guaranteed data retention: 100 years
Small packages options
—8-lead SOIC package
—14-lead TSSOP package
—8-lead XBGA package
DESCRIPTION
The μPort Saver memories need no serial ports or
special hardware and connect to the processor mem-
ory bus. Replacing bytewide data memory, the μPort
Saver uses bytewide memory control functions, takes
a fraction of the board space and consumes much less
power. Replacing serial memories, the μPort Saver
provides all the serial benefits, such as low cost, low
power, low voltage, and small package size while
releasing I/Os for more important uses.
The μPort Saver memory outputs data within 30ns of
an active read signal. This is less than the read access
time of most hosts and provides “no-wait-state” opera-
tion. This prevents bottlenecks on the bus. With 10
MHz, the μPort Saver supplies data faster than
required by most host read cycle specifications. This
eliminates the need for software NOPs.
The μPort Saver memories communicate over one line
of the data bus using a sequence of standard bus read
and write operations. This “bit serial” interface allows
the μPort Saver to work well in 8-bit, 16 bit, 32-bit, and
64-bit systems.
A Write Protect (WP) pin prevents inadvertent writes to
the memory.
Xicor EEPROMs are designed and tested for applica-
tions requiring extended endurance. Inherent data
retention is greater than 100 years.
BLOCK DIAGRAM
CE
I/O
H.V. Generation
Timing & Control
EEPROM
Array
32K x 8
Command
Decode
and
Control
Logic
X
DEC
Y Decode
Data Register
WP
OE
WE
P0/CS
P1/CLK
P2/DI
P3/DO
System Connection
Internal Block Diagram
MPS
μP
μC
Ports
Saved
DSP
ASIC
RISC
A15
A0
D7
D0
OE
WE
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| X86-64 | x86-64 - Advanced Micro Devices. Inc. x86-64TM Technology White Paper |
| X88064 | E2 Micro-Peripheral |
| X88064P | E2 Micro-Peripheral |
| X88064P-60 | E2 Micro-Peripheral |
| X88064PI | E2 Micro-Peripheral |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| X84256V14I | 制造商:XICOR 制造商全稱:Xicor Inc. 功能描述:UPort Saver EEPROM |
| X84256V14I-1.8 | 制造商:XICOR 制造商全稱:Xicor Inc. 功能描述:UPort Saver EEPROM |
| X84256V14I-2.5 | 制造商:XICOR 制造商全稱:Xicor Inc. 功能描述:UPort Saver EEPROM |
| X84256Z | 制造商:XICOR 制造商全稱:Xicor Inc. 功能描述:UPort Saver EEPROM |
| X84256Z-1.8 | 制造商:XICOR 制造商全稱:Xicor Inc. 功能描述:UPort Saver EEPROM |
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