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參數資料
| 型號： | X4645V8I-4.5A |
| 廠商： | INTERSIL CORP |
| 元件分類： | 電源管理 |
| 英文描述： | CPU Supervidor with 64K EEPROM |
| 中文描述： | 1-CHANNEL POWER SUPPLY MANAGEMENT CKT, PDSO8 |
| 封裝： | PLASTIC, TSSOP-8 |
| 文件頁數： | 16/22頁 |
| 文件大?。?/td> | 408K |
| 代理商： | X4645V8I-4.5A |
X4643/5 – Preliminary Information
Characteristics subject to change without notice.
16 of 22
REV 1.26 4/30/02
www.xicor.com
TIMING DIAGRAMS
Bus Timing
WP Pin Timing
Write Cycle Timing
Nonvolatile Write Cycle Timing
Notes:
(1) t
WC
is the time from a valid stop condition at the end of a write sequence to the end of the self-timed internal nonvolatile write cycle.
It is the minimum cycle time to be allowed for any nonvolatile write by the user, unless Acknowledge Polling is used.
Symbol
t
WC
(1)
Parameter
Write Cycle Time
Min.
Typ.
(1)
5
Max.
10
Unit
ms
t
SU:STO
t
DH
t
HIGH
t
SU:STA
t
HD:STA
t
HD:DAT
t
SU:DAT
SCL
SDA IN
SDA OUT
t
F
t
LOW
t
BUF
t
AA
t
R
t
HD:WP
SCL
SDA IN
WP
t
SU:WP
Clk 1
Clk 9
Slave Address Byte
START
SCL
SDA
t
WC
8th bit of Last Byte
ACK
Stop
Condition
Start
Condition
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