參數(shù)資料
型號: X40030S14IZ-B
廠商: INTERSIL CORP
元件分類: 電源管理
英文描述: Triple Voltage Monitor with Integrated CPU Supervisor
中文描述: 3-CHANNEL POWER SUPPLY MANAGEMENT CKT, PDSO14
封裝: 0.150 INCH, ROHS COMPLIANT, SOIC-14
文件頁數(shù): 1/24頁
文件大小: 360K
代理商: X40030S14IZ-B
1
FN8114.1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774
|
Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2005-2006. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
PRELIMINARY
X40030, X40031, X40034, X40035
Triple Voltage Monitor with Integrated
CPU Supervisor
FEATURES
Triple voltage detection and reset assertion
—Standard reset threshold settings
see selection table on page 5.
—Adjust low voltage reset threshold voltages
using special programming sequence
—Reset signal valid to V
CC
= 1V
—Monitor three seperate voltages
Fault detection register
Selectable power on reset timeout
(0.05s, 0.2s, 0.4s, 0.8s)
Selectable watchdog timer interval
(25ms, 200ms, 1.4s or off)
Debounced manual reset input
Low power CMOS
—25μA typical standby current, watchdog on
—6μA typical standby current, watchdog off
400kHz 2-wire interface
2.7V to 5.5V power supply operation
Available in 14 Ld SOIC, TSSOP packages
Monitor voltages: 5V to 0.9V
Independent core voltage monitor
Pb-free plus anneal available (RoHS compliant)
APPLICATIONS
Communication equipment
—Routers, hubs, switches
—Disk arrays, network storage
Industrial systems
—Process control
—Intelligent instrumentation
Computer systems
—Computers
—Network servers
DESCRIPTION
The X40030, X40031, X40034, X40035 combine
power-on reset control, watchdog timer, supply voltage
supervision, second and third voltage supervision, and
manual reset, in one package. This combination lowers
system cost, reduces board space requirements, and
increases reliability.
Applying voltage to V
CC
activates the power on reset cir-
cuit which holds RESET/RESET active for a period of
time. This allows the power supply and system oscillator
to stabilize before the processor can execute code.
Low VCC detection circuitry protects the user’s system
from low voltage conditions, resetting the system when
VCC falls below the minimum VTRIP1 point.
RESET/RESET is active until VCC returns to proper
operating level and stabilizes. A second and third voltage
monitor circuit tracks the unregulated supply to provide a
power fail warning or monitors different power supply
voltage. Three common low voltage combinations are
available, however, Intersil’s unique circuits allows the
threshold for either voltage monitor to be reprogrammed
to meet specific system level requirements or to fine-tune
the threshold for applications requiring higher precision.
BLOCK DIAGRAM
V3FAIL
V2FAIL
WDO
MR
LOWLINE
RESET
X40031/35
X40030/34
V3 Monitor
Logic
V2 Monitor
Logic
Fault Detection
Register
Status
Register
Data
Register
Command
Decode Test
& Control
Logic
Power on,
Manual Reset
Low Voltage
Reset
Generation
V
CC
Monitor
Logic
V3MON
V2MON
SDA
WP
SCL
V
CC
(V1MON)
Watchdog
and
Reset Logic
+
-
V
TRIP3
+
-
V
TRIP2
+
-
V
TRIP1
V
or
V2MON*
Data Sheet
May 25, 2006
相關PDF資料
PDF描述
X40034V14Z-B Triple Voltage Monitor with Integrated CPU Supervisor
X40030S14Z-B Triple Voltage Monitor with Integrated CPU Supervisor
X40030V14Z-B Triple Voltage Monitor with Integrated CPU Supervisor
X40034S14-A Triple Voltage Monitor with Integrated CPU Supervisor
X40034S14-B Triple Voltage Monitor with Integrated CPU Supervisor
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