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參數(shù)資料
| 型號： | X28HC64J-50 |
| 英文描述： | 5 Volt, Byte Alterable E2PROM |
| 中文描述： | 5伏，可變E2PROM的字節(jié) |
| 文件頁數(shù)： | 6/24頁 |
| 文件大小： | 112K |
| 代理商： | X28HC64J-50 |
6
X28HC64
HARDWARE DATA PROTECTION
The X28HC64 provides two hardware features that
protect nonvolatile data from inadvertent writes.
Default V
CC
Sense—All write functions are inhibited
when V
CC
is
≤
3V typically.
Write Inhibit—Holding either
OE
LOW,
WE
HIGH, or
CE
HIGH will prevent an inadvertent write cycle during
power-up and power-down, maintaining data integrity.
SOFTWARE DATA PROTECTION
The X28HC64 offers a software controlled data protec-
tion feature. The X28HC64 is shipped from Xicor with
the software data protection NOT ENABLED; that is, the
device will be in the standard operating mode. In this
mode data should be protected during power-up/-down
operations through the use of external circuits. The host
would then have open read and write access of the
device once V
CC
was stable.
The X28HC64 can be automatically protected during
power-up and power-down without the need for external
circuits by employing the software data protection fea-
ture. The internal software data protection circuit is
enabled after the first write operation utilizing the soft-
ware algorithm. This circuit is nonvolatile and will remain
set for the life of the device unless the reset command
is issued.
Once the software protection is enabled, the X28HC64
is also protected from inadvertent and accidental writes
in the powered-up state. That is, the software algorithm
must be issued prior to writing additional data to the
device.
SOFTWARE ALGORITHM
Selecting the software data protection mode requires
the host system to precede data write operations by a
series of three write operations to three specific ad-
dresses. Refer to Figure 6 and 7 for the sequence. The
three-byte sequence opens the page write window
enabling the host to write from one to sixty-four bytes of
data. Once the page load cycle has been completed, the
device will automatically be returned to the data pro-
tected state.
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| X28HC64JI-12 | 5 Volt, Byte Alterable E2PROM |
| X28HC64JI-50 | 5 Volt, Byte Alterable E2PROM |
| X28HC64JI-70 | 5 Volt, Byte Alterable E2PROM |
| X28HC64JI-90 | 5 Volt, Byte Alterable E2PROM |
| X28HC64JM-12 | 5 Volt, Byte Alterable E2PROM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| X28HC64J-55 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x8 EEPROM |
| X28HC64J-70 | 制造商:Intersil Corporation 功能描述:EEPROM PARALLEL 64KBIT 8KX8 5V 32PLCC - Rail/Tube |
| X28HC64J-70T1 | 功能描述:電可擦除可編程只讀存儲器 8K X 8, CMOS 電可擦除可編程只讀存儲器, SDP, 32 PLCC, COM.,70NS T & R RoHS:否 制造商:Intersil 存儲容量: 組織: 數(shù)據(jù)保留: 最大時鐘頻率: 最大工作電流: 工作電源電壓: 最大工作溫度: 安裝風(fēng)格: 封裝 / 箱體: |
| X28HC64J-90 | 功能描述:IC EEPROM 64KBIT 90NS 32PLCC RoHS:否 類別:集成電路 (IC) >> 存儲器 系列:- 標(biāo)準(zhǔn)包裝:150 系列:- 格式 - 存儲器:EEPROMs - 串行 存儲器類型:EEPROM 存儲容量:4K (2 x 256 x 8) 速度:400kHz 接口:I²C，2 線串口 電源電壓:2.5 V ~ 5.5 V 工作溫度:-40°C ~ 85°C 封裝/外殼:8-VFDFN 裸露焊盤 供應(yīng)商設(shè)備封裝:8-DFN（2x3） 包裝:管件 產(chǎn)品目錄頁面:1445 (CN2011-ZH PDF) |
| X28HC64J-90T1 | 制造商:Intersil Corporation 功能描述:EEPROM PARALLEL 64KBIT 8KX8 5V 32PLCC - Tape and Reel |
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