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參數(shù)資料
| 型號： | WV3EG265M64EFSU262D4-S |
| 廠商： | WHITE ELECTRONIC DESIGNS CORP |
| 元件分類： | DRAM |
| 英文描述： | 128M X 64 DDR DRAM MODULE, 0.75 ns, DMA200 |
| 封裝： | SODIMM-200 |
| 文件頁數(shù)： | 8/10頁 |
| 文件大?。?/td> | 148K |
| 代理商： | WV3EG265M64EFSU262D4-S |
7
White Electronic Designs Corporation (602) 437-1520 www.wedc.com
White Electronic Designs WV3EG265M64EFSU-D4
October 2005
Rev. 1
AC TIMING PARAMETERS (Continued)
0 ≤ TA ≤ 70°C, VCC = 2.5V, VCCQ = 2.5V
Parameter
Symbol
335
262
265
Unit
Min
Max
Min
Max
Min
Max
Mode register set cycle time
tMRD
10
ns
DQ & DM setup time to DQS
tDS
0.45
0.5
ns
DQ & DM hold time to DQS
tDH
0.4
0.5
ns
Control & Address input pulse width
tIPW
2.2
ns
DQ & DM input pulse width
tDIPW
1.75
ns
Exit self refresh to non-Read command
tXSNR
75
ns
Exit self refresh to read command
tXSRD
200
tCK
Refresh interval time
tREFI
7.8
us
Output DQS valid window
tQH
tHP - tQHS
—tHP - tQHS
—ns
Clock half period
tHP
tCLmin or
tCHmin
—
tCLmin or
tCHmin
—
tCLmin or
tCHmin
—ns
Data hold skew factor
tQHS
0.55
0.75
ns
DQS write postamble time
tWPST
0.4
0.6
0.4
0.6
0.4
0.6
ns
Active to Read with Auto precharge command
tRAP
15
20
ns
Auto precharge write recovery + Precharge time
tRAL
(tWR/tCK) +
(tRP/tCK)
(tWR/tCK) +
(tRP/tCK)
(tWR/tCK) +
(tRP/tCK)
tCK
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| WV3EG265M64EFSU-D4 | 制造商:WEDC 制造商全稱:White Electronic Designs Corporation 功能描述:1GB- 2x64Mx64 DDR SDRAM UNBUFFERED, w/PLL |
| WV3EG265M72EFSU262D4IM | 制造商:WEDC 制造商全稱:White Electronic Designs Corporation 功能描述:1GB - 2x64Mx72 DDR SDRAM, UNBUFFERED, PLL, FBGA |
| WV3EG265M72EFSU262D4IMG | 制造商:WEDC 制造商全稱:White Electronic Designs Corporation 功能描述:1GB - 2x64Mx72 DDR SDRAM, UNBUFFERED, PLL, FBGA |
| WV3EG265M72EFSU262D4IN | 制造商:WEDC 制造商全稱:White Electronic Designs Corporation 功能描述:1GB - 2x64Mx72 DDR SDRAM, UNBUFFERED, PLL, FBGA |
| WV3EG265M72EFSU262D4ING | 制造商:WEDC 制造商全稱:White Electronic Designs Corporation 功能描述:1GB - 2x64Mx72 DDR SDRAM, UNBUFFERED, PLL, FBGA |
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