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參數(shù)資料
| 型號： | WV3EG265M64EFSU262D4-S |
| 廠商： | WHITE ELECTRONIC DESIGNS CORP |
| 元件分類： | DRAM |
| 英文描述： | 128M X 64 DDR DRAM MODULE, 0.75 ns, DMA200 |
| 封裝： | SODIMM-200 |
| 文件頁數(shù)： | 7/10頁 |
| 文件大?。?/td> | 148K |
| 代理商： | WV3EG265M64EFSU262D4-S |
6
White Electronic Designs Corporation (602) 437-1520 www.wedc.com
White Electronic Designs WV3EG265M64EFSU-D4
October 2005
Rev. 1
AC TIMING PARAMETERS
0 ≤ TA ≤ 70°C, VCC = 2.5V, VCCQ = 2.5V
Parameter
Symbol
335
262
265
Unit
Min
Max
Min
Max
Min
Max
Row cycle time
tRC
60
65
ns
Refresh row cycletime
tRFC
72
75
ns
Row active time
tRAS
42
70K
40
120K
40
120K
ns
RAS# to CAS# delay
tRCD
15
20
ns
Row precharge time
tRP
15
20
ns
Row active to Rowactivedelay
tRRD
12
15
ns
Write recovery time
tWR
15
ns
Last data into Read command
tWTR
111
ns
Clock cycle time
CL=2.0
tCK
7.5
13
7.5
13
10
13
ns
CL=2.5
6
13
7.5
13
7.5
13
ns
Clock high leve width
tCH
0.45
0.55
0.45
0.55
0.45
0.55
tCK
Clock low level width
tCL
0.55
tCK
DQS-out access time from CK/CK#
tDQSCK
-0.6
+0.6
-0.75
+0.75
-0.75
+0.75
ns
Output data access time from CK/CK#
tAC
-0.7
+0.7
-0.75
+0.75
-0.75
+0.75
ns
Data strobe edge to ouput data edge
tDQSQ
—
0.45
—
0.5
—
0.5
ns
Read Preamble
tRPRE
0.9
1.1
0.9
1.1
0.9
1.1
tCK
Read Postamble
tRPST
0.4
0.6
0.4
0.6
0.4
0.6
tCK
CK to valid DQS-in
tDQSS
0.75
1.25
0.75
1.25
0.75
1.25
tCK
DQS-in setup time
tWPRES
000
ns
DQS-in hold time
tWPRE
0.25
tCK
DQS falling edge to CK rising-setup time
tDSS
0.2
tCK
DQS falling edge from CK rising-hold time
tDSH
0.2
tCK
DQS-in high level width
tDQSH
0.35
tCK
DQS-in low level width
tDQSL
0.35
tCK
Address and Control Input setup time (fast)
tISF
0.75
0.9
ns
Address and Control Input hold time (fast)
tISHF
0.75
0.9
ns
Address and Control Input setup time (slow)
tISS
0.8
1
ns
Address and Control Input hold time (slow)
tIHS
0.8
1
ns
Data-out high impedence time from CK/CK#
tHZ
+0.7
+0.75
ns
Data-out low impedence time from CK/CK#
tLZ
-0.7
-0.75
ns
Note:
AC Timing Parameters are based on Micron components. Other DRAM Manufacturers parameters may be different.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| WV3EG265M64EFSU-D4 | 制造商:WEDC 制造商全稱:White Electronic Designs Corporation 功能描述:1GB- 2x64Mx64 DDR SDRAM UNBUFFERED, w/PLL |
| WV3EG265M72EFSU262D4IM | 制造商:WEDC 制造商全稱:White Electronic Designs Corporation 功能描述:1GB - 2x64Mx72 DDR SDRAM, UNBUFFERED, PLL, FBGA |
| WV3EG265M72EFSU262D4IMG | 制造商:WEDC 制造商全稱:White Electronic Designs Corporation 功能描述:1GB - 2x64Mx72 DDR SDRAM, UNBUFFERED, PLL, FBGA |
| WV3EG265M72EFSU262D4IN | 制造商:WEDC 制造商全稱:White Electronic Designs Corporation 功能描述:1GB - 2x64Mx72 DDR SDRAM, UNBUFFERED, PLL, FBGA |
| WV3EG265M72EFSU262D4ING | 制造商:WEDC 制造商全稱:White Electronic Designs Corporation 功能描述:1GB - 2x64Mx72 DDR SDRAM, UNBUFFERED, PLL, FBGA |
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