參數(shù)資料
型號(hào): WM8782
廠商: Wolfson Microelectronics
元件分類: ADC
英文描述: 24-Bit, 192kHz Stereo ADC
中文描述: 24位192kHz立體聲ADC
文件頁(yè)數(shù): 12/19頁(yè)
文件大?。?/td> 216K
代理商: WM8782
WM8782
Product Preview
w
PP, May 2004, Rev 1.0
12
AUDIO DATA FORMATS
In Left Justified mode, the MSB is available on the first rising edge of BCLK following an LRCLK
transition. The other bits up to the LSB are then transmitted in order. Depending on word length,
BCLK frequency and sample rate, there may be unused BCLK cycles before each LRCLK transition.
Figure 7 Left Justified Audio Interface (assuming n-bit word length)
In Right Justified mode, the LSB is available on the last rising edge of BCLK before an LRCLK
transition. All other bits are transmitted before (MSB first). Depending on word length, BCLK
frequency and sample rate, there may be unused BCLK cycles after each LRCLK transition.
Figure 8 Right Justified Audio Interface (assuming n-bit word length)
In I
2
S mode, the MSB is available on the second rising edge of BCLK following an LRCLK transition.
The other bits up to the LSB are then transmitted in order. Depending on word length, BCLK
frequency and sample rate, there may be unused BCLK cycles between the LSB of one sample and
the MSB of the next.
Figure 9 - I
2
S Justified Audio Interface (assuming n-bit word length)
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WM8782ASEDS/V 功能描述:音頻模/數(shù)轉(zhuǎn)換器 IC STEREO ADC RoHS:否 制造商:Wolfson Microelectronics 轉(zhuǎn)換速率: 分辨率: ADC 輸入端數(shù)量: 工作電源電壓: 最大工作溫度: 最小工作溫度: 安裝風(fēng)格: 封裝 / 箱體: 封裝: