參數(shù)資料
型號: WM8718SEDS
廠商: Wolfson Microelectronics
英文描述: 24 BIT DIFFERENTIAL STEREO DAC WITH VOLUME CONTROL
中文描述: 24位差分立體聲DAC,具有音量控制
文件頁數(shù): 19/27頁
文件大小: 284K
代理商: WM8718SEDS
WM8718
Production Data
w
PD Rev 4.1 March 2004
19
ATTENUATOR CONTROL MODE
Setting the ATC register bit causes the left channel attenuation settings to be applied to both left
and right channel DACs from the next audio input sample. No update to the attenuation registers
is required for ATC to take effect. (The right channels registry settings are preserved.)
REGISTER ADDRESS
0011
PCM Control
BIT
5
LABEL
ATC
DEFAULT
0
DESCRIPTION
Attenuator Control Mode:
0: Right channels use Right
attenuation
1: Right Channels use Left
Attenuation
Table 8 Attenuation Control Select
BCKIN POLARITY
By default, LRCIN and DIN are sampled on the rising edge of BCKIN and should ideally change
on the falling edge. Data sources which change LRCIN and DIN on the rising edge of BCKIN can
be supported by setting the BCP register bit. Setting BCP to 1 inverts the polarity of BCKIN to the
inverse of that shown in Figure 4, Figure 5, Figure 6, Figure 7 and Figure 8
REGISTER ADDRESS
0011
PCM Control
BIT
6
LABEL
BCP
DEFAULT
0
DESCRIPTION
BCKIN
0: normal polarity
1: inverted polarity
Table 9 BCKIN Polarity Control
OUTPUT PHASE REVERSAL
The REV register bit controls the phase of the output signal. Setting the REV bit causes the
phase of the output signal to be inverted.
REGISTER ADDRESS
0011
PCM Control
BIT
7
LABEL
REV
DEFAULT
0
DESCRIPTION
Analogue Output Phase
0: Normal
1: Inverted
Table 10 Output Phase Control
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