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參數(shù)資料
| 型號： | WM2627 |
| 廠商： | Wolfson Microelectronics |
| 英文描述： | Quad 8-Bit Serial Input Voltage Output DAC |
| 中文描述： | 四8位串行輸入電壓輸出DAC |
| 文件頁數(shù)： | 5/11頁 |
| 文件大?。?/td> | 107K |
| 代理商： | WM2627 |
WM2627
Production Data
WOLFSON MICROELECTRONICS LTD
PD Rev 1.0 April 2001
5
Test Conditions:
R
L
= 10k
, C
L
= 100pF. AVDD = DVDD
= 5V
±
10%, V
REF
= 2.048V and AVDD = DVDD
= 3V
±
10%, V
REF
= 1.024V over
recommended operating free-air temperature range (unless noted otherwise).
PARAMETER
SYMBOL
TEST CONDITIONS
Reference
Reference input resistance
R
REFIN
Reference input capacitance
C
REFIN
Reference feedthrough
V
REF
= 1V
PP
at 1kHz
+ 1.024V dc, DAC code 0
Reference input bandwidth
V
REF
= 0.2V
PP
+ 1.024V dc
MIN
TYP
MAX
UNIT
10
5
-75
M
pF
dB
DAC code 128
Slow
Fast
0.5
1
MHz
MHz
Digital Inputs
High level input current
Low level input current
Input capacitance
I
IH
I
IL
C
I
Input voltage = DVDD
Input voltage = 0V
±1
±1
μ
A
μ
A
pF
3
Notes:
1.
Integral non-linearity
(INL) is the maximum deviation of the output from the line between zero and full scale (excluding the effects
of zero code and full scale errors).
Differential non-linearity
(DNL) is the difference between the measured and ideal 1LSB amplitude change of any adjacent two
codes. A guarantee of monotonicity means the output voltage changes in the same direction (or remains constant) as a change in
digital input code.
Zero code error
is the voltage output when the DAC input code is zero.
Gain error
is the deviation from the ideal full scale output excluding the effects of zero code error.
Power supply rejection ratio
is measured by varying AVDD from 4.5V to 5.5V and measuring the proportion of this signal imposed
on the zero code error and the gain error.
Zero code error
and
Gain error
temperature coefficients are normalised to full scale voltage.
Output load regulation
is the difference between the output voltage at full scale with a 10k
load and 2k
load. It is expressed as
a percentage of the full scale output voltage with a 10k
load.
I
DD
is measured while continuously writing code 512 to the DAC. For V
IH
< DVDD - 0.7V and V
IL
> 0.7V supply current will increase.
Slew rate
results are for the lower value of the rising and falling edge slew rates.
10.
Settling time
is the time taken for the signal to settle to within 0.1LSB of the final measured value for both rising and falling edges.
Limits are ensured by design and characterisation, but are not production tested.
11.
SNR, SNRD, THD
and
SPFDR
are measured on a synthesised sinewave at frequency f
OUT
generated with a sampling frequency fs
.
2.
3.
4.
5.
6.
7.
8.
9.
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相關代理商/技術參數(shù) |
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| WM2627CDT | 制造商:WOLFSON 制造商全稱:WOLFSON 功能描述:Quad 8-Bit Serial Input Voltage Output DAC |
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| WM2629 | 制造商:WOLFSON 制造商全稱:WOLFSON 功能描述:Octal 8-bit, Serial Input, Voltage Output DAC with Power Down |
| WM2630 | 制造商:WOLFSON 制造商全稱:WOLFSON 功能描述:Octal 12-bit, Serial Input, Voltage Output DAC with Internal Reference |
| WM2630CDT | 制造商:WOLFSON 制造商全稱:WOLFSON 功能描述:Octal 12-bit, Serial Input, Voltage Output DAC with Internal Reference |
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