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參數(shù)資料
| 型號： | W78M64VP120SBM |
| 廠商： | MICROSEMI CORP-PMG MICROELECTRONICS |
| 元件分類： | 存儲器 |
| 英文描述： | SPECIALTY MEMORY CIRCUIT, PBGA156 |
| 封裝： | 13 X 22 MM, PLASTIC, BGA-156 |
| 文件頁數(shù)： | 14/48頁 |
| 文件大?。?/td> | 1548K |
| 代理商： | W78M64VP120SBM |
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White Electronic Designs Corporation (602) 437-1520 www.whiteedc.com
White Electronic Designs
W78M64VP-XSBX
October 2008
Rev. 2
ADVANCED
White Electronic Designs Corp. reserves the right to change products or specications without notice.
TABLE 18 WRITE OPERATION STATUS
Status
DQ7
(Note 2)
DQ6
DQ5
(Note 1)
DQ3
DQ2
(Note 2)
DQ1
RY/BY#
Standard Mode
Embedded Program
Algorithm
DQ7#
Toggle
0
N/A
No toggle
0
Embedded Erase
Algorithm
0
Toggle
0
1
Toggle
N/A
0
Program
Suspend Mode
Program Suspend Read
Program-Suspended
Sector
Invalid (not allowed)
1
Non-Suspend Sector
Data
1
Erase Suspend
Mode
Erase-Suspend Read
Erase-Suspended
Sector
1
No toggle
0
N/A
Toggle
N/A
1
Non-Erase Suspended
Sector
Data
1
Erase-Suspend-Program (Embedded Program)
DQ7#
Toggle
0
N/A
0
Write-to-Buffer
Busy (Note 3)
DQ7#
Toggle
0
N/A
0
Abort (Note 4)
DQ7#
Toggle
0
N/A
1
0
Notes
1. DQ5 switches to 1 when an Embedded Program, Embedded Erase, or Write-to-Buffer operation has exceeded the maximum timing limits. Refer toDQ5: Exceeded Timing Limits on page
39 for more information.
2. DQ7 and DQ2 require a valid address when reading status information. Refer to the appropriate subsection for further details.
3. The Data# Polling algorithm should be used to monitor the last loaded write-buffer address location.
4. DQ1 switches to 1 when the device has aborted the write-to-buffer operation
TABLE 19 SOFTWARE FUNCTIONS RESET
(LLD Function = lld_ResetCmd)
Cycle
Operation
Byte Address
Word Address
Data
Reset Command
Write
Base + xxxh
00F0h
TABLE 20 LOCK REGISTER
DQ15-3
DQ2
DQ1
DQ0
Don't Care
Password Protection Mode
Lock Bit
Persistent Protection Mode
Lock Bit
Secured Silicon Sector
Protection Bit
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