- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄203632 > W78M64V100SBC (WHITE ELECTRONIC DESIGNS CORP) 8M X 64 FLASH 3.3V PROM MODULE, 100 ns, PBGA159 PDF資料下載
參數(shù)資料
| 型號(hào)： | W78M64V100SBC |
| 廠商： | WHITE ELECTRONIC DESIGNS CORP |
| 元件分類： | PROM |
| 英文描述： | 8M X 64 FLASH 3.3V PROM MODULE, 100 ns, PBGA159 |
| 封裝： | 13 X 22 MM, 1.27 MM PITCH, PLASTIC, BGA-159 |
| 文件頁數(shù)： | 16/54頁 |
| 文件大?。?/td> | 1348K |
| 代理商： | W78M64V100SBC |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁當(dāng)前第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁
23
White Electronic Designs Corporation (602) 437-1520 www.whiteedc.com
White Electronic Designs
W78M64V-XSBX
July 2006
Rev. 4
White Electronic Designs Corp. reserves the right to change products or specications without notice.
Once the SecSi Sector is locked and veried, the system
must write the Exit SecSi Sector Region command
sequence to return to reading and writing the remainder
of the array.
The SecSi Sector lock must be used with caution since,
once locked, there is no procedure available for unlocking
the SecSi Sector area and none of the bits in the SecSi
Sector memory space can be modied in any way.
program/erase circuits are disabled, and the device resets
to the read mode. Subsequent writes are ignored until VCC
is greater than VLKO. The system must provide the proper
signals to the control pins to prevent unintentional writes
when VCC is greater than VLKO.
Write Pulse “Glitch” Protection
Noise pulses of less than 3 ns (typical) on OE#, CS#, or
WE# do not initiate a write cycle.
Logical Inhibit
Write cycles are inhibited by holding any one of OE# = VIL,
CS# = VIH or WE# = VIH. To initiate a write cycle, CS# and
WE# must be a logical zero while OE# is a logical one.
Power-Up Write Inhibit
If WE# = CS# = VIL and OE# = VIH during power up, the
device does not accept commands on the rising edge of
WE#. The internal state machine is automatically reset to
the read mode on power-up.
COMMON FLASH MEMORY
INTERFACE (CFI)
The Common Flash Interface (CFI) specication outlines
device and host system software interrogation handshake,
which allows specic vendor-specied software algorithms
to be used for entire families of devices. Software support
can then be device-independent, JEDEC ID-independent,
and forward- and backward-compatible for the specied
ash device families. Flash vendors can standardize their
existing interfaces for long-term compatibility.
This device enters the CFI Query mode when the system
writes the CFI Query command, 98h, to address 55h, any
time the device is ready to read array data. The system
can read CFI information at the addresses given in Tables
9–12. To terminate reading CFI data, the system must write
the reset command. The CFI Query mode is not accessible
when the device is executing an Embedded Program or
embedded Erase algorithm.
The system can also write the CFI query command when
the device is in the autoselect mode. The device enters the
CFI query mode, and the system can read CFI data at the
addresses given in Tables 9–12. The system must write the
reset command to return the device to reading array data.
Write 60h to
any address
Write 40h to SecSi
Sector address
with A6 = 0,
A1=1, A0=0
RESET# =
VIH or VID
Wait 1 s
Read from SecSi
Sector address
with A6 = 0,
A1=1, A0=0
If data = 00h,
SecSi Sector is
unprotected.
If data = 01h,
SecSi Sector is
protected.
Remove VIH or VID
from RESET#
Write reset
command
SecSi Sector
Protect Verify
complete
START
SecSi Sector Protection Bits
The SecSi Sector Protection Bits prevent programming of
the SecSi Sector memory area. Once set, the SecSi Sector
memory area contents are non-modiable.
Hardware Data Protection
The command sequence requirement of unlock cycles for
programming or erasing provides data protection against
inadvertent writes. In addition, the following hardware
data protection measures prevent accidental erasure
or programming, which might otherwise be caused by
spurious system level signals during VCC power-up and
power-down transitions, or from system noise.
Low VCC Write Inhibit
When VCC is less than VLKO, the device does not accept
any write cycles. This protects data during VCC power-up
and power-down. The command register and all internal
FIGURE 5. SecSi SECTOR PROTECT VERIFY
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| W78M64VP120SBM | SPECIALTY MEMORY CIRCUIT, PBGA156 |
| W78M64VP120SBI | SPECIALTY MEMORY CIRCUIT, PBGA156 |
| W83L761G | DIGITAL TEMP SENSOR-SERIAL |
| W8D-PF29062 | 36 CONTACT(S), FEMALE, STRAIGHT SINGLE PART CARD EDGE CONN, PRESS FIT |
| W8D-PF29063 | 36 CONTACT(S), FEMALE, STRAIGHT SINGLE PART CARD EDGE CONN, PRESS FIT |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| W78M64VP110SBM | 制造商:Microsemi Corporation 功能描述:8MX64 FLASH 3.3V PAGE MODE - Bulk |
| W78M64V-XSBX | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Flash MCP |
| W78NCSX-23 | 功能描述:低信號(hào)繼電器 - PCB 4PDT 3A 24VDC IND RoHS:否 制造商:NEC 觸點(diǎn)形式:2 Form C (DPDT-BM) 觸點(diǎn)電流額定值: 線圈電壓:5 V 最大開關(guān)電流:1 A 線圈電流:1 A 線圈類型:Non-Latching 功耗:140 mW 端接類型:SMT 絕緣: 介入損耗: |
| W78PCX-1 | 制造商:Magnecraft 功能描述: |
| W78PCX-2 | 制造商:Magnecraft 功能描述: |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。