參數(shù)資料
型號(hào): W78ERD2A40FL
廠商: WINBOND ELECTRONICS CORP
元件分類: 微控制器/微處理器
英文描述: 8-BIT MICROCONTROLLER
中文描述: 8-BIT, FLASH, 40 MHz, MICROCONTROLLER, PQFP44
封裝: ROHS COMPLIANT, PLASTIC, QFP-44
文件頁數(shù): 40/76頁
文件大小: 650K
代理商: W78ERD2A40FL
W78ERD2/W78ERD2A
- 40 -
Transmission begins when data is written to SBUF but is synchronized with the roll-over of Timer 1
(divided by 16 or 32, as configured) and not the write signal. The W78ERD2 waits until the next roll-
over of Timer 1 (divided by 16 or 32) before the data is put on TxD. The next bit is placed on TxD after
the next rollover. After all eight bits of data are transmitted, the stop bit is transmitted. Finally, the TI
flag is set, at the tenth rollover after the write signal.
Reception is enabled only if REN is high. The W78ERD2 samples the RxD line at a rate of 16 times
the selected baud rate, looking for a falling edge. When a falling edge is detected on the RxD pin,
Timer 1 (divided by 16 or 32) is immediately reset to align the bit boundaries better, and the serial port
starts receiving data. The 16 states of the counter effectively divide the time into 16 slices, and bit
detection is done on a best-of-three basis using the eighth, ninth and tenth states. If the start bit is
invalid (1), reception is aborted, and the serial port resumes looking for a falling edge on RxD. If the
start bit is valid, the eight data bits are shifted in. Then, if
(1) RI = 0 and
(2) SM2 = 0 or the stop bit = 1,
the stop bit is put into RB8, the data is put in SBUF, and RI is set. Otherwise, the received frame may
be lost. In the middle of the stop bit, the W78ERD2 resumes looking for falling edges on RxD.
10.3 MODE 2
Mode 2 is a full-duplex, asynchronous mode. Serial communication frames are made up of eleven bits
transmitted on TXD and received on RXD. The eleven bits consist of a start bit (0), eight data bits
(LSB first), a programmable ninth bit (TB8) and a stop bit (1). The ninth bit is read into and transmitted
from RB8. The baud rate is either 1/32 or 1/64 of the oscillator frequency, and the 1/32 or 1/64 factor
is determined by the SMOD bit in PCON SFR. The functional diagram is shown below.
SBUF
RB8
Transmit Shift Register
Receive Shift Register
TX
SHIFT
PAROUT
D8
Internal
Data Bus
Internal
Data
Bus
TXD
RXD
Serial Port
Interrupt
SMOD =
SAMPLE
Write to
SBUF
TX
START
TX
CLOCK
SOUT
0
1
TI
PARIN
STOP
START
LOAD
CLOCK
Read
SBUF
RI
SERIAL
CONTROLLER
RX CLOCK
LOAD
SBUF
RX START
RX SHIFT
2
16
1-TO-0
DETECTOR
BIT
DETECTOR
16
CLOCK
SIN
D8
TB8
1/2 fosc
Figure 10-3 Serial Port Mode 2
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