參數(shù)資料
型號(hào)： W78E62B
廠商： WINBOND ELECTRONICS CORP
元件分類(lèi)： 8位微控制器
英文描述： 8-BIT MICROCONTROLLER
中文描述： 8位微控制器
文件頁(yè)數(shù)： 3/34頁(yè)
文件大?。?/td> 393K
代理商： W78E62B
W78E62B
Publication Release Date: June 1999
- 3 -
Revision A1
PIN DESCRIPTION
SYMBOL
TYPE
DESCRIPTIONS
EA
I
EXTERNAL ACCESS ENABLE: This pin forces the processor to execute the
external ROM. The ROM address and data will not be presented on the bus if
the
EA
pin is high and the program counter is within the 64 KB area.
PSEN
O H
PROGRAM STORE ENABLE: PSEN enables the external ROM data in the
Port 0 address/data bus. When internal ROM access is performed, no PSEN
strobe signal outputs originate from this pin.
ALE
O H
ADDRESS LATCH ENABLE: ALE is used to enable the address latch that
separates the address from the data on Port 0. ALE runs at 1/6th of the
oscillator frequency. An ALE pulse is omitted during external data memory
accesses.
RST
I L
RESET: A high on this pin for two machine cycles while the oscillator is
running resets the device.
XTAL1
I
CRYSTAL 1: This is the crystal oscillator input. This pin may be driven by an
external clock.
XTAL2
O
CRYSTAL 2: This is the crystal oscillator output. It is the inversion of XTAL1.
V
SS
I
GROUND: ground potential.
V
DD
I
POWER SUPPLY: Supply voltage for operation.
P0.0
P0.7
P1.0
P1.7
P2.0
P2.7
I/O D
PORT 0: Function is the same as that of standard 8052.
I/O H
PORT 1: Function is the same as that of standard 8052.
I/O H
PORT 2: Port 2 is a bi-directional I/O port with internal pull-ups. This port also
provides the upper address bits for accesses to external memory. It also can
be programmed to be an output-latched port like an on-chip 74373, or a
buffer input port like an on-chip 74244.
P3.0
P3.7
P4.0
P4.3
I/O H
PORT 3: Function is the same as that of the standard 8052.
I/O H
PORT 4: A bi-directional I/O port with alternate function. See details below.
* Note :
TYPE
I: input, O: output, I/O: bi-directional, H: pull-high, L: pull-low, D: open drain
Port 4
Port 4, SFR P4 at address D8H, is a 4-bit multipurpose programmable I/O port. Each bit can be
configured individually by software. The Port 4 has four different operation mode:
In mode 0, P4.0
P4.3 is a bi-directional I/O port which is same as port 1. P4.2 and P4.3 also serve as
external interrupt
INT3
and
INT2
if enabled.
In mode 1, P4.0
P4.3 are read data strobe signals which are synchronized with RD signal at
specified addresses. These signals can be used as chip-select signals for external peripherals.
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