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參數資料
| 型號： | W78E058B40PL |
| 廠商： | WINBOND ELECTRONICS CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT MICROCONTROLLER |
| 中文描述： | 8-BIT, FLASH, 40 MHz, MICROCONTROLLER, PQCC44 |
| 封裝： | ROHS COMPLIANT, PLASTIC, LCC-44 |
| 文件頁數： | 9/36頁 |
| 文件大?。?/td> | 406K |
| 代理商： | W78E058B40PL |
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W78E58B/W78E058B
Publication Release Date: December 4, 2006
- 9 -
Revision A8
5.9 Port 4
Port 4, address D8H, is a 4-bit multipurpose programmable I/O port. Each bit can be configured
individually by software. The Port 4 has four different operation modes.
Mode 0: P4.0
P4.3 is a bi-directional I/O port which is same as port 1. P4.2 and P4.3 also serve as
external interrupt
INT3
and
NT2
I
if enabled.
Mode 1: P4.0
P4.3 are read strobe signals that are synchronized with
RD
signal at specified
addresses. These signals can be used as chip-select signals for external peripherals.
Mode 2: P4.0
P4.3 are write strobe signals that are synchronized with
WR
signal at specified
addresses. These signals can be used as chip-select signals for external peripherals.
Mode 3: P4.0
P4.3 are read/write strobe signals that are synchronized with
RD
or
WR
signal at
specified addresses. These signals can be used as chip-select signals for external
peripherals.
When Port 4 is configured with the feature of chip-select signals, the chip-select signal address range
depends on the contents of the SFR P4xAH, P4xAL, P4CONA and P4CONB. The registers P4xAH
and P4xAL contain the 16-bit base address of P4.x. The registers P4CONA and P4CONB contain the
control bits to configure the Port 4 operation mode.
5.10
INT2
/
NT3
I
Two additional external interrupts,
INT2
and
INT3
, whose functions are similar to those of external
interrupt 0 and 1 in the standard 80C52. The functions/status of these interrupts are
determined/shown by the bits in the XICON (External Interrupt Control) register. The XICON register is
bit-addressable but is not a standard register in the standard 80C52. Its address is at 0C0H. To
set/clear bits in the XICON register, one can use the "SETB (
CLR
) bit" instruction. For example,
"SETB 0C2H" sets the EX2 bit of XICON.
XICON - external interrupt control (C0H)
PX3
EX3
IE3
IT3
PX2
EX2
IE2
IT2
PX3: External interrupt 3 priority high if set
EX3: External interrupt 3 enable if set
IE3: If IT3 = 1, IE3 is set/cleared automatically by hardware when interrupt is detected/serviced
IT3: External interrupt 3 is falling-edge/low-level triggered when this bit is set/cleared by software
PX2: External interrupt 2 priority high if set
EX2: External interrupt 2 enable if set
IE2: If IT2 = 1, IE2 is set/cleared automatically by hardware when interrupt is detected/serviced
IT2: External interrupt 2 is falling-edge/low-level triggered when this bit is set/cleared by software
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