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  • 參數(shù)資料
    型號(hào): W77LE58P-25
    廠商: WINBOND ELECTRONICS CORP
    元件分類(lèi): 微控制器/微處理器
    英文描述: 8 BIT MICROCONTROLLER
    中文描述: 8-BIT, FLASH, 25 MHz, MICROCONTROLLER, PQCC44
    封裝: PLASTIC, LCC-44
    文件頁(yè)數(shù): 66/81頁(yè)
    文件大?。?/td> 657K
    代理商: W77LE58P-25
    Preliminary W77LE58
    - 66 -
    Multiprocessor Communications
    Multiprocessor communications makes use of the 9th data bit in modes 2 and 3. In the W77LE58, the
    RI flag is set only if the received byte corresponds to the Given or Broadcast address. This hardware
    feature eliminates the software overhead required in checking every received address, and greatly
    simplifies the software programmer task.
    In the multiprocessor communication mode, the address bytes are distinguished from the data bytes
    by transmitting the address with the 9th bit set high. When the master processor wants to transmit a
    block of data to one of the slaves, it first sends out the address of the targeted slave (or slaves). All
    the slave processors should have their SM2 bit set high when waiting for an address byte. This
    ensures that they will be interrupted only by the reception of a address byte. The Automatic address
    recognition feature ensures that only the addressed slave will be interrupted. The address comparison
    is done in hardware not software.
    The addressed slave clears the SM2 bit, thereby clearing the way to receive data bytes. With SM2 =
    0, the slave will be interrupted on the reception of every single complete frame of data. The
    unaddressed slaves will be unaffected, as they will be still waiting for their address. In Mode 1, the 9th
    bit is the stop bit, which is 1 in case of a valid frame. If SM2 is 1, then RI is set only if a valid frame is
    received and the received byte matches the Given or Broadcast address.
    The Master processor can selectively communicate with groups of slaves by using the Given
    Address. All the slaves can be addressed together using the Broadcast Address. The addresses for
    each slave are defined by the SADDR and SADEN SFRs. The slave address is an 8-bit value
    specified in the SADDR SFR. The SADEN SFR is actually a mask for the byte value in SADDR. If a
    bit position in SADEN is 0, then the corresponding bit position in SADDR is don't care. Only those bit
    positions in SADDR whose corresponding bits in SADEN are 1 are used to obtain the Given Address.
    This gives the user flexibility to address multiple slaves without changing the slave address in
    SADDR.
    The following example shows how the user can define the Given Address to address different slaves.
    Slave 1:
    SADDR 1010 0100
    SADEN 1111 1010
    Given 1010 0x0x
    Slave 2:
    SADDR 1010 0111
    SADEN 1111 1001
    Given 1010 0xx1
    The Given address for slave 1 and 2 differ in the LSB. For slave 1, it is a don't care, while for slave 2
    it is 1. Thus to communicate only with slave 1, the master must send an address with LSB = 0 (1010
    0000). Similarly the bit 1 position is 0 for slave 1 and don't care for slave 2. Hence to communicate
    only with slave 2 the master has to transmit an address with bit 1 = 1 (1010 0011). If the master
    wishes to communicate with both slaves simultaneously, then the address must have bit 0 = 1 and bit
    1 = 0. The bit 3 position is don't care for both the slaves. This allows two different addresses to select
    both slaves (1010 0001 and 1010 0101).
    The master can communicate with all the slaves simultaneously with the Broadcast Address. This
    address is formed from the logical ORing of the SADDR and SADEN SFRs. The zeros in the result
    are defined as don't cares In most cases the Broadcast Address is FFh. In the previous case, the
    Broadcast Address is (1111111X) for slave 1 and (11111111) for slave 2.
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