參數(shù)資料
型號: W77LE58F-25
廠商: WINBOND ELECTRONICS CORP
元件分類: 微控制器/微處理器
英文描述: 8 BIT MICROCONTROLLER
中文描述: 8-BIT, FLASH, 25 MHz, MICROCONTROLLER, PQFP44
封裝: QFP-44
文件頁數(shù): 16/81頁
文件大?。?/td> 657K
代理商: W77LE58F-25
Preliminary W77LE58
- 16 -
Port 1
Bit:
7
6
5
4
3
2
1
0
P1.7
P1.6
P1.5
P1.4
P1.3
P1.2
P1.1
P1.0
Mnemonic: P1
Address: 90h
P1.7-0: General purpose I/O port. Most instructions will read the port pins in case of a port read
access, however in case of read-modify-write instructions, the port latch is read. Some pins
also have alternate input or output functions. This alternate functions are described below:
P1.0 : T2
External I/O for Timer/Counter 2
P1.1 : T2EX
Timer/Counter 2 Capture/Reload Trigger
P1.2 : RXD1
Serial Port 1 Receive
P1.3 : TXD1
Serial Port 1 Transmit
P1.4 : INT2
External Interrupt 2
P1.5 : INT3
External Interrupt 3
P1.6 : INT4
External Interrupt 4
P1.7 : INT5
External Interrupt 5
External Interrupt Flag
Bit:
7
6
5
4
3
2
1
0
IE5
IE4
IE3
IE2
XT/RG RGMD
RGSL
0
Mnemonic: EXIF
Address: 91h
IE5: External Interrupt 5 flag. Set by hardware when a falling edge is detected on INT5 .
IE4: External Interrupt 4 flag. Set by hardware when a rising edge is detected on INT4.
IE3: External Interrupt 3 flag. Set by hardware when a falling edge is detected on INT3 .
IE2: External Interrupt 2 flag. Set by hardware when a rising edge is detected on INT2.
XT/RG: Crystal/RC Oscillator Select. Setting this bit selects crystal or external clock as system clock
source. Clearing this bit selects the on-chip RC oscillator as clock source. XTUP(STATUS.4)
must be set to 1 and XTOFF (PMR.3) must be cleared before this bit can be set. Attempts to
set this bit without obeying these conditions will be ignored. This bit is set to 1 after a power-
on reset and unchanged by other forms of reset.
RGMD: RC Mode Status. This bit indicates the current clock source of microcontroller. When cleared,
CPU is operating from the external crystal or oscillator. When set, CPU is operating from the
on-chip RC oscillator. This bit is cleared to 0 after a power-on reset and unchanged by other
forms of reset.
RGSL: RC Oscillator Select. This bit selects the clock source following a resume from Power Down
Mode. Setting this bit allows device operating from RC oscillator when a resume from Power
Down Mode. When this bit is cleared, the device will hold operation until the crystal oscillator
has warmed-up following a resume from Power Down Mode. This bit is cleared to 0 after a
power-on reset and unchanged by other forms of reset.
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