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參數(shù)資料
| 型號： | W49F020T-70B |
| 元件分類： | EEPROM |
| 英文描述： | EEPROM |
| 中文描述： | EEPROM的 |
| 文件頁數(shù)： | 4/23頁 |
| 文件大?。?/td> | 280K |
| 代理商： | W49F020T-70B |
W49F020
- 4 -
automatically return to normal read mode after the erase operation completed. Data polling and/or
Toggle Bits can be used to detect end of erase cycle.
Program Operation
The W49F020 is programmed on a byte-by-byte basis. Program operation can only change logical data
"1" to logical data "0." The erase operation (changed entire data in main memory blocks and/or boot
block from "0" to "1") is needed before programming.
The program operation is initiated by a 4-word command cycle (see Command Codes for Byte
Programming). The device will internally enter the program operation immediately after the
byte-program command is entered. The internal program timer will automatically time-out (50
μ
S max. -
T
BP
) when completing programming and return to normal read mode. Data polling and/or Toggle Bits
can be used to detect end of program cycle.
Hardware Data Protection
The integrity of the data stored in the W49F020 is also hardware protected in the following ways:
(1) Noise/Glitch Protection: A #WE pulse with less than 15 nS in duration will not initiate a write cycle.
(2) V
DD
Power Up/Down Detection: The programming and read operation are inhibited when V
DD
is
less than 2.5V typical.
(3) Write Inhibit Mode: Forcing #OE low, #CE high, or #WE high will inhibit the write operation. This
prevents inadvertent writes during power-up or power-down periods.
(4) V
DD
power-on delay: When V
DD
has reached its sense level, the device will automatically time-out
5 mS before any write (erase/program) operation.
Data Polling (DQ
7
)- Write Status Detection
The W49F020 features a data polling function which used to indicate the end of a program or erase
cycle. When the W49F020 is in the internal program or erase cycle, any attemption to read DQ
7
of the
last word loaded will receive the complement of the true data. Once the program or erase cycle is
completed, DQ
7
will show the true data. Note that DQ
7
will show logical "0" during the erase cycle, and
become logical "1" or true data when the erase cycle has been completed.
Toggle Bit (DQ
6
)- Write Status Detection
In addition to data polling, the W49F020 provides another method for determining the end of a program
cycle. During the internal program or erase cycle, any consecutive attempts to read DQ
6
will produce
alternating 0's and 1's. When the program or erase cycle is completed, this toggling between 0's and 1's
will stop. The device is then ready for the next operation.
Product Identification
The product ID operation outputs the manufacturer code and device code. Programming equipment
automatically matches the device with its proper erase and programming algorithms.
The manufacturer and device codes can be accessed by software or hardware operation. In software
access mode, a three-word (or JEDEC 3-word) command sequence can be used to access the product
ID. A read from address 0000H outputs the manufacturer code DA(hex); and a read from address
0001H outputs the device code 8C(hex) for W49F020. The product ID operation can be terminated by a
three-word command sequence or an alternated one-word command sequence (see Command
Definition table).
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相關(guān)代理商/技術(shù)參數(shù) |
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| W49F102P-45 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:EEPROM|FLASH|64KX16|CMOS|LDCC|44PIN|PLASTIC |
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