參數(shù)資料
型號(hào): W3H64M16E-400BC
廠商: MICROSEMI CORP-PMG MICROELECTRONICS
元件分類: DRAM
英文描述: 64M X 16 DDR DRAM, 0.6 ns, PBGA79
封裝: 14 X 11 MM, 1.27 MM PITCH, PLASTIC, BGA-79
文件頁(yè)數(shù): 24/30頁(yè)
文件大?。?/td> 881K
代理商: W3H64M16E-400BC
W3H64M16E-XBX
30
White Electronic Designs Corporation (602) 437-1520 www.whiteedc.com
White Electronic Designs
July 2009
Rev. 5
White Electronic Designs Corp. reserves the right to change products or specications without notice.
Document Title
64M x 16 DDR2 SDRAM 79 PBGA Multi-Chip Package
Revision History
Rev #
History
Release Date
Status
Rev 0
Initial Release
August 2008
Advanced
Rev 1
Changes (Pg. 1, 3, 5)
1.1 Add pinout compatible with 2-Rank version
(W3H264M16E-XNBX)
1.2 Change balls F2, F3, H7 to DNU; reserved for signals
CKE1, ODT1, and CS1 respectively on the 2-Rank version.
(W3H264M16E-XNBX), change ball J10 to K7 is reserved
for signal A13 on future upgrades.
1.3 Table-1 ball descriptions: In the DNU section add upgrades
to dual rank W3H264M16E-XNBX; CKE1, ODT1 and CS1.
December 2008
Advanced
Rev 2
Changes (Pg. 1, 5, 13, 16, 22, 23, 24, 29)
2.1 Change data sheet from advanced to preliminary
2.2 VCCQ is common to VCC
2.3 Remove "DM" in ODT termination
2.4 Table 3; single bank pre charge - BA, WRITE/WE# to H
2.5 Note 1, (under tables): VCC and VCCQ are tied on the
device, remove note 4
2.6 BGA thermal resistance: To obtain the junction temperature
increase, multiply the thermal resistance by the power
dissipated in each die in the MCP
2.7 Updated ICC specications and conditions
2.8 Increase drawing size and add measurement scale
January 2009
Preliminary
Rev 3
Changes (Pg. 1, 5)
3.1 Remove "under development, is not qualied or
characterized and is", "or cancellation"
3.2 "Add: Single chip internally congured as an 8-bank DRAM
3.3 Change from Preliminary to Final
July 2009
Final
Rev 4
Changes (Pg. 1)
4.1 Remove 667, 533 Mbs data rates. Contact factory for more
information on these data rates.
July 2009
Final
Rev 5
Changes (Pg. 2, 29)
5.1 Correct pin E3 from DNU to LDQS, correct pin B4 from
GDN to GND.
5.2 Remove 533 , 667 from Data Rate (Mb/s)
相關(guān)PDF資料
PDF描述
W3H64M64E-400SBC 64M X 64 DDR DRAM, 0.6 ns, PBGA208
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W3H64M72E-400ESI 64M X 72 DDR DRAM, 0.6 ns, PBGA208
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