參數(shù)資料
型號(hào)： W29GL032CT7A
廠商： WINBOND ELECTRONICS CORP
元件分類： PROM
英文描述： 2M X 16 FLASH 3V PROM, 80 ns, PBGA48
封裝： GREEN, VFBGA-48
文件頁(yè)數(shù)： 7/65頁(yè)
文件大小： 650K
代理商： W29GL032CT7A
W29GL032C
Publication Release Date: January 19, 2011
9
Preliminary - Revision B
7.2.9
Erasing the Memory Array
Sector Erase and Chip Erase are the two possible types of erase operations executed on the memory
array. Sector Erase operation erases one or more selected sectors and this can be simultaneous. Chip
Erase operation erases the entire memory array, except for any protected sectors.
7.2.9.1
Sector Erase
The sector erase operation returns all selected sectors in memory to the “1” state, effectively clearing
all data. This action requires six instruction cycles to commence the erase operation. The unlock
sequence is the first two cycles, followed by the configuration cycle, the fourth and fifth are
also ”unlock cycles”, and the Sector Erase instruction is the sixth cycle. An internal 50s time-out
counter is started once the sector erase instruction sequence has been completed. During this time,
additional sector addresses and Sector Erase commands may be issued, thus allowing for multiple
sectors to be selected and erased simultaneously. Once the 50s time-out counter has reached its
limit, no additional command instructions will be accepted and the embedded sector erase algorithm
will commence.
Note, that the 50s time-out counter restarts after every sector erase instruction sequence. The device
will abort and return to Read mode, if any instruction other than Sector Erase or Erase Suspend is
attempted during the time-out period.
Once the embedded sector erase algorithm begins, all instructions except Erase Suspend or
Hardware Reset will be ignored. The hardware reset will abort the erase operation and return the
device to the Read mode.
The embedded sector erase algorithm status can be verified by the following:
Status
DQ7
DQ6
DQ5
DQ3
1
DQ2
RY/#BY
2
Time-out period
0
Toggling
0
Toggling
0
In progress
0
Toggling
0
1
Toggling
0
Exceeded time limit
0
Toggling
1
Toggling
0
Table 7-4
Polling During Embedded Sector Erase Operation
Note:
1.
The DQ3 status bit is the 50s time-out indicator. When DQ3=0, the 50s time-out counter has not yet reached zero
and the new Sector Erase instruction maybe issued to specify the address of another sector to be erased. When
DQ3=1, the 50s time-out counter has expired and the Sector Erase operation has already begun. Erase Suspend is
the only valid instruction that maybe issued once the embedded erase operation is underway.
2.
RY/#BY is an open drain output pin and should be connected to VCC through a high value pull-up resistor.
3.
When an attempt is made to erase only protected sector(s), the erase operation will abort thus preventing any data
changes in the protected sector(s). DQ7 will output “0” and DQ6 will toggle briefly (100s or less) before aborting and
returning the device to Read mode. If unprotected sectors are also specified, however, they will be erased normally
and the protected sector(s) will remain unchanged.
4.
DQ2 is a localized indicator showing a specified sector is undergoing erase operation or not. DQ2 toggles when user
reads at the addresses where the sectors are actively being erased (in erase mode) or to be erased (in erase
suspend mode).
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