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| 型號： | VSLI2002_1MB_MRAM |
| 英文描述： | A low power 1Mbit MRAM based on 1T1MTJ bit cell integration with copper interconnects |
| 中文描述： | 甲低功耗1Mbit的基礎(chǔ)上1T1MTJ的MRAM位單元集成銅互連 |
| 文件頁數(shù)： | 2/4頁 |
| 文件大?。?/td> | 246K |
| 代理商： | VSLI2002_1MB_MRAM |
To be published at VLSI Symposium 2002
1T1MTJ Memory Cell
A. Cell Architecture
The cell architecture is based on a minimum-sized
active transistor as the isolation device in conjunction with a
magnetic tunnel junction element. In the 1T1MTJ MRAM,
the MTJ element has one electrode connected to the drain of a
pass transistor for isolation and the other electrode connected
to the bit line. Neighboring cells share the pass transistor
source and isolation region to minimize cell area. The MTJ
element is integrated into a five-layer metal, 0.6
μ
m CMOS
process with 1.8
μ
m metal pitches resulting in a cell size of
7.2
μ
m
2
or 9F
2
, where F is one-half the metal pitch.
Program Mode
“OFF”
i
i
cladding layer
Fixed Layer
Tunnel Barrier
Free Layer
interconnects
Field
Bit Line
1-MTJ/1-Transistor Memory Cell
Isolation
Transistor
Flux concentrating
Inlaid Copper
Magnetic
DgtLn
Fig. 3. Magnetic Tunnel Junction device cell with 1-MTJ/1-
Transistor showing Write Mode operation with flux
concentrating cladding layers.
B. Programming bits
The MRAM bit cell is programmed by a magnetic
field, which is generated by current flowing through two
conductors while the transistor is in the cutoff state (shown in
Fig. 3). The direction of polarization of free layer is
controlled via the direction of current flow through the
bitlines. Each conductor supplies half the field required to
switch the bit. These conductors are inlaid copper
interconnects with flux concentrating cladding to focus the
generated magnetic field. The flux-concentrating layer is
composed of a thin layer of soft ferromagnetic material that is
integrated into the inlaid copper interconnect process. The
flux concentrators reduce the required current by
approximately a factor of 2 as compared to lines without
cladding (see Fig. 4). The requirements for the flux
concentrating cladding are that the remanence and coercivity
are minimized and the magnetic response is linear. Fig. 5
shows measured field response from cladded and uncladded
lines, demonstrating a factor of 2 improvement in field
generated for a given current, but also showing a slight
remanence characteristic. An additional benefit of the flux
concentrators is that they focus the generated magnetic field
over the target cell, reducing cross talk during programming.
The conductors are arranged in a cross-point half-
select architecture where the intersection of two current-
carrying lines generates a field sufficient to switch the bit at
the intersection, but leave other bits on either line
undisturbed. One line provides the field that affects the
“easy” magnetic axis of the bit, while another line provides
the field that affects the “hard” magnetic axis of the bit.
50
0
10
20
30
40
0
0.1
0.2
0.3
0.4
H
Distance above line (
μ
m)
Without cladding
With cladding
Fig. 4. Calculated field generated at a distance from a 0.4x0.9
μ
m
2
line with and without cladding using 4mA current.
0
1
2
-4
-2
0
2
4
Uncladded digit line
Cladded line
Current in Line (mA)
Fig. 5. Normalized measured field at 0.3
μ
m above 0.9
μ
m
wide,
0.4
μ
m thick cladded and uncladded lines.
C. Reading bits
Achieving a high percentage change in resistance
between the high and low resistance states (MR=(Rmax-
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