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參數(shù)資料
| 型號： | VSC7133QU |
| 廠商： | VITESSE SEMICONDUCTOR CORP |
| 元件分類： | 網(wǎng)絡(luò)接口 |
| 英文描述： | 10-bit Transceiver for Fibre Channel and Gigabit Ethernet |
| 中文描述： | DATACOM, ETHERNET TRANSCEIVER, PQFP64 |
| 封裝： | 10 MM, THERMALLY ENHANCED, PLASTIC, QFP-64 |
| 文件頁數(shù)： | 1/18頁 |
| 文件大?。?/td> | 304K |
| 代理商： | VSC7133QU |
VITESSE
SEMICONDUCTOR CORPORATION
7
41 Calle Plano, Camarillo, CA 93012 805/388-3700 FAX: 805/987-5896
Page 1
1/17/00
VITESSE
10-bit Transceiver for Fibre
Channel and Gigabit Ethernet
Advance Product Information
VSC7133
G52187-0 Rev. 2.4
Features
802.3z Gigabit Ethernet Compliant 1.25
Gb/s Transceiver
General Description
The VSC7133 is a full-speed Fibre Channel and Gigabit Ethernet Transceiver with industry-standard
pinouts. It accepts 10-bit 8B/10B encoded transmit data, latches it on the rising edge of the TTL/PECL REF-
CLK and serializes it onto the TX PECL differential outputs at a baud rate which is ten times the REFCLK fre-
quency. Serial data input on the RX PECL differential inputs is resampled by the Clock Recovery Unit,
deserialized onto the 10-bit receive data bus synchronously to complementary divide-by-twenty clocks. The
VSC7133 r
eceiver detects “Comma” characters for frame alignment. An analog/digital signal detection circuit
indicates that a valid signal is present on the RX input. A cable equalizer compensates for Inter Symbol Interfer-
ence in order to increase maximum cable distances. The VSC7133 contains PLL circuitry for synthesis of the
baud-rate transmit clock, and extraction of the clock from the received serial stream. The VSC7133 is similar to
the VSC7123 but has either a TTL or a PECL reference clock.
VSC7133 Block Diagram
ANSI X3T11 Fibre Channel Compliant
1.0625 Gb/s Transceiver
0.98 to 1.36 Gb/s Full Duplex Operation
10 Bit TTL Interface for Transmit and
Receive Data
TTL or PECL Reference Clock
Automatic Lock-to-Reference
RX Cable Equalization and Signal Detect
JTAG Access Port for Testability
64-pin, 10mm PQFP Packaging
Single +3.3V Supply, 650 mW
RX+
RX-
Q D
Serial to
Parallel
Clock
Recovery
÷
10
Comma
Detect
R(0:9)
COMDET
ENCDET
EWRAP
SIGDET
T(0:9)
x10 Clock
Multiply
Parallel
to Serial
TX+
TX-
÷
20
RCLK
RCLKN
10
10
2:1
Signal
Detect
Q D
Q
D
D Q
D Q
NOT SHOWN: JTAG Boundary Scan
REFCLKP
REFCLKN
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| VSC7135 | 1.25Gbits/sec Gigabit Ethernet Transceiver |
| VSC7139 | Quad Transceiver for Gigabit Ethernet and Fibre Channel |
| VSC7140 | 1.0625 Gb/s Fibre Channel Dual Repeater / Hub Node |
| VSC7140QJ | 1.0625 Gb/s Fibre Channel Dual Repeater / Hub Node |
| VSC7142 | Dual Repeater/Retimer for Fibre Channel and Gigabit Ethernet |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| VSC7135 | 制造商:VITESSE 制造商全稱:Vitesse Semiconductor Corporation 功能描述:1.25Gbits/sec Gigabit Ethernet Transceiver |
| VSC7135QN | 制造商:Vitesse Semiconductor Corporation 功能描述:LAN Transceiver, Single, 64 Pin, Plastic, QFP |
| VSC7135QU | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:LAN Transceiver |
| VSC7139 | 制造商:VITESSE 制造商全稱:Vitesse Semiconductor Corporation 功能描述:Quad Transceiver for Gigabit Ethernet and Fibre Channel |
| VSC7139TW | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Telecomm/Datacomm |
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