參數(shù)資料
型號(hào): VNC2-64Q1B-REEL
廠商: FTDI, Future Technology Devices International Ltd
文件頁(yè)數(shù): 42/88頁(yè)
文件大小: 0K
描述: IC USB HOST/DEVICE CTRL 64-QFN
應(yīng)用說(shuō)明: Vinculum-II IO Cell Description AppNote
Vinculum-II Debug Interface Description AppNote
Vinculum-II IO Mux Explained AppNote
Vinculum-II PWM Example AppNote
Migrating Vinculum Designs AppNote
特色產(chǎn)品: Vinculum VNC2
標(biāo)準(zhǔn)包裝: 1
系列: Vinculum-II
控制器類型: USB 2.0 控制器
接口: USB,主機(jī)/設(shè)備配置,UART,SPI,PWM,閃存 256K,DMA 4CH
電源電壓: 1.62 V ~ 1.98 V
電流 - 電源: 25mA
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 64-VFQFN 裸露焊盤
供應(yīng)商設(shè)備封裝: 64-QFN(8x8)
包裝: 標(biāo)準(zhǔn)包裝
產(chǎn)品目錄頁(yè)面: 634 (CN2011-ZH PDF)
其它名稱: 768-1046-6
47
Copyright 2009-2011 Future Technology Devices International Limited
Datasheet
Vinculum-II Embedded Dual USB Host Controller IC
Version 1.5
Document No.: FT_000138 Clearance No.: FTDI# 143
6.3.5 Unmanaged Mode
The VNC2 SPI Slave also supports an unmanaged SPI mode. This is a simple data exchange between
Master and Slave. It operates in the standard 4 pin mode (SS#, CLK, MOSI and MISO) with all transfers
controlled by the SPI Master.
When the CPU wants to send data out of the SPI Slave it writes this into the spi_slave_data_tx register.
This will then be moved into the transfer shift register to wait for the SPI Master to request it. The SPI
Master will at some point assert SS# and start clocking data on MOSI with SCK. As this is shifted into the
transfer shift register, the SPI Slave will also be shifting data in the opposite direction on MISO. At the
end of the transfer the SPI Slave copies the received data from the shift register to spi_slave_data_rx as
seen in Figure 6.12.
SPI
Clk Div
0
1
2
3
4
5
6
7
Rx Shift Register
SPI Master
SPI Slave
ss#
clk
mosi
miso
0
1
2
3
4
5
6
7
Shift Register
0
1
2
3
4
5
6
7
Shift Register
0
1
2
3
4
5
6
7
Tx Shift Register
Figure 6.12 Unmanaged Mode Transfer Diagram
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