參數(shù)資料
型號(hào): VDP31XXB
廠商: MICRONAS SEMICONDUCTOR HOLDING AG
英文描述: Video Processor Family
中文描述: 視頻處理器系列
文件頁(yè)數(shù): 3/72頁(yè)
文件大?。?/td> 597K
代理商: VDP31XXB
PRELIMINARY DATA SHEET
VDP 31xxB
3
Micronas
Contents, continued
Page
Section
Title
21
21
22
23
23
24
24
24
26
26
26
28
28
29
29
2.9.
2.9.1.
2.9.2.
2.9.3.
2.9.4.
2.9.5.
2.9.6.
2.10.
2.11.
2.11.1.
2.11.2.
2.11.3.
2.11.4.
2.12.
2.13.
Analog Back End
CRT Measurement and Control
SCART Output Signal
Average Beam Current Limiter
Analog RGB Insertion
Fast Blank Monitor
Half Contrast Control
IO Port Expander
Synchronization and Deflection
Deflection Processing
Horizontal Phase Adjustment
Vertical and East/West Deflection
Protection Circuitry
Reset Function
Standby and Power-On
30
30
30
43
46
3.
3.1.
3.2.
3.2.1.
3.2.2.
Serial Interface
I
2
C-Bus Interface
Control and Status Registers
Scaler Adjustment
Calculation of Vertical and East-West Deflection Coefficients
47
47
47
49
51
52
54
54
54
54
55
56
56
56
57
57
57
58
59
60
60
60
4.
4.1.
4.2.
4.3.
4.4.
4.5.
4.6.
4.6.1.
4.6.2.
4.6.3.
4.6.4.
4.6.4.1.
4.6.4.2.
4.6.4.3.
4.6.4.4.
4.6.4.5.
4.6.4.6.
4.6.4.7.
4.6.4.8.
4.6.4.9.
4.6.4.10.
4.6.4.11.
Specifications
Outline Dimensions
Pin Connections and Short Descriptions
Pin Descriptions
Pin Configuration
Pin Circuits
Electrical Characteristics
Absolute Maximum Ratings
Recommended Operating Conditions
Recommended Crystal Characteristics
Characteristics
5 MHz Clock Output
20 MHz Clock Input/Output, External Clock Input (XTAL1)
Reset Input, Test Input
I
2
C-Bus Interface
IO Port Expander
Analog Video Inputs
Analog Front-End and ADCs
Picture Bus Input
INTLC, Front Sync Output
Main Sync Output
Combined Sync Output
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