Pin De scrip ion
Ta ble 3
Ap pli ca ion In or ma ion
Neg a ive-Going V
Tran sients
In ad di ion to is su ng a re set to the mi cro pro ces sor dur ng
power-up, power-down, and brown out con di ions, the
V6309/V6319 are rel a ively im mune to short du a ion neg
a ive-going V
tran sients (glitches). Fig. 8 shows typ cal
tran sient du a ion vs. Re set com para or over drive, for
which the V6309/V6319 do not gen er ate a re set pulse. The
graph was gen er ated us ng a neg a ive-going pulse ap
plied to V
, start ng 0.5 V above the ac ual re set thresh old
and end ng be ow it by the mag ni ude in di cated (re set
com para or over drive). The graph in di cates the max mum
pulse width a neg a ive-going V
DD
tran sient can have with
out caus ng a re set pulse. As the mag ni ude of the tran
sient in creases (goes far her be ow the re set thresh old),
the max mum al ow able pulse width de creases. Typically,
for the V6309L and V6319M, a V
tran sient that goes 100
mV be ow the re set thresh old and lasts 20
μ
s or less will
not cause a re set pulse. A 0.1
μ
F by pass ca pac or
mounted as close as pos si ble to the V
DD
pin pro vides ad di
tional tran sient im mu nity.
En suring a Valid Re set Out put down to V
DD
= 0 V
When V
falls be ow 1 V, the V6309 RESET out put no lon
ger sinks cur ent, it be comes an open cir cuit. There ore,
high-impedance CMOS logic in puts con nected to RESET
can drift to un de er mined volt ages. This pres ents no prob
lem in most ap pli ca ions, since most μP and other cir cuitry
is in op er a ive with V
DD
be ow 1 V. How ever, in ap pli ca ions
where RESET must be valid down to 0 V, add ng a
pull-down re sis or to RESETcauses any stray leak age cur
rents to flow to ground, hold ng RESET low (Fig.10). R1’s
value is not crit cal; 100 k
is large enough not to load
RESET and small enough to pull RESET to ground. A 100
k
pull-up re sis or to V
is also rec om mended for the
V6319, if RESET is re quired to re main valid for V
DD
<1 V.
4
V6309/V6319
Pin
1
2
Name
V
SS
for V6309
RESET
Func ion
Ground
RESET Out put re mains low while V
is be ow the re set thresh old and rises
for 240 ms af er V
DD
above the re set
thresh old
RESET Out put re mains high while V
DD
is be ow the re set thresh old and rises
for 240 ms af er V
above the re set
Sup ply volt age (+5V, +3.3V or +3.0V )
2
for V6319
RESET
3
V
DD
Max.Transient Du a ion with out Causing a Re set
Pulse ver sus Re set Com para or Overdrive
Fig. 9