參數(shù)資料
型號: V58C2256804SHLS6I
廠商: PROMOS TECHNOLOGIES INC
元件分類: DRAM
英文描述: 32M X 8 DDR DRAM, PBGA60
封裝: M0-233, FBGA-60
文件頁數(shù): 32/60頁
文件大小: 1125K
代理商: V58C2256804SHLS6I
38
V58C2256(804/404/164)SH Rev. 1.1 July 2010
ProMOS TECHNOLOGIES
V58C2256(804/404/164)SH
Slew Rate Derating Values
(Notes: 14; notes appear on pages 50-53) ( VDDQ= +2.5V ±0.2V, VDD = +2.5V ±0.2V )
Slew Rate Derating Values
(Note: 31; notes appear on pages 50-53) ( VDDQ = +2.5V ±0.2V, VDD = +2.5V ±0.2V )
NOTES:
1. All voltages referenced to VSS.
2. Tests for AC timing, IDD, and electrical AC and DC characteristics may be conducted at nominal
reference/supply voltage levels, but the related specifications and device operation are guaranteed for the
full voltage range specified.
3. Outputs measured with equivalent load:
4. AC timing and IDD tests may use a VIL-to-VIH swing of up to 1.5V in the test environment, but input
timing is still referenced to VREF (or to the crossing point for CK/CK), and parameter specifications
are guaranteed for the specified AC input levels under normal use conditions. The minimum slew rate
for the input signals used to test the device is 1V/ns in the range between VIL(AC) and VIH(AC).
ADDRESS / COMMAND
SLEW RATE
Δ tIS
Δ tIH
UNITS
NOTES
0.500V / ns
0
ps
14
0.400V / ns
+50
ps
14
0.300V / ns
+100
ps
14
0.200V / ns
+150
ps
14
Date, DQS, DM
SLEW RATE
Δ tDS
Δ tDH
UNITS
NOTES
0.500V / ns
0
ps
31
0.400V / ns
+75
ps
31
0.300V / ns
+150
ps
31
0.200V / ns
+225
ps
31
Output
(VOUT)
VTT
50
Ω
Reference
Point
30pF
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