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參數(shù)資料
| 型號： | V54C365164VD |
| 廠商： | Mosel Vitelic, Corp. |
| 英文描述： | HIGH PERFORMANCE 225/200/166/143 MHz 3.3 VOLT 4M X 16 SYNCHRONOUS DRAM 4 BANKS X 1Mbit X 16 |
| 中文描述： | 高性能225/200/166/143 MHz的3.3伏4米× 16 SYNCHRONOU擰DRAM的4銀行X為1Mbit × 16 |
| 文件頁數(shù)： | 1/54頁 |
| 文件大小： | 1570K |
| 代理商： | V54C365164VD |
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MOSEL VITELIC
1
V54C365164VC
HIGH PERFORMANCE 166/143/125 MHz
3.3 VOLT 4M X 16 SYNCHRONOUS DRAM
4 BANKS X 1Mbit X 16
V54C365164VC Rev. 0.8 July 2001
PRELIMINARY
6
7
8PC
System Frequency (f
CK
)
166 MHz
143 MHz
125 MHz
Clock Cycle Time (t
CK3
)
6 ns
7 ns
8 ns
Clock Access Time (t
AC3
) CAS Latency = 3
5.4 ns
5.4 ns
6 ns
Clock Access Time (t
AC2
) CAS Latency = 2
5.5 ns
5.5 ns
6 ns
Clock Access Time (t
AC1
) CAS Latency = 1
13 ns
13 ns
13 ns
Features
I
4 banks x 1Mbit x 16 organization
I
High speed data transfer rates up to 166 MHz
I
Full Synchronous Dynamic RAM, with all signals
referenced to clock rising edge
I
Single Pulsed RAS Interface
I
Data Mask for byte Control
I
Four Banks controlled by BA0 & BA1
I
Programmable CAS Latency: 1, 2, & 3
I
Programmable Wrap Sequence: Sequential or
Interleave
I
Programmable Burst Length:
1, 2, 4, 8 and full page for Sequential Type
1, 2, 4, 8 for Interleave Type
I
Multiple Burst Read with Single Write Operation
I
Automatic and Controlled Precharge Command
I
Random Column Address every CLK (1-N Rule)
I
Suspend Mode and Power Down Mode
I
Auto Refresh and Self Refresh
I
Refresh Interval: 4096 cycles/64 ms
I
Available in 54 Pin 400 mil TSOP-II
I
LVTTL Interface
I
Single +3.3 V
±
0.3 V Power Supply
Description
The V54C365164VC is a four bank Synchronous
DRAM organized as 4 banks x 1Mbit x 16. The
V54C365164VC achieves high speed data transfer
rates up to 166 MHz by employing a chip architec-
ture that prefetches multiple bits and then synchro-
nizes the output data to a system clock
All of the control, address, data input and output
circuits are synchronized with the positive edge of
an externally supplied clock.
Operating the four memory banks in an inter-
leaved fashion allows random access operation to
occur at higher rate than is possible with standard
DRAMs. A sequential and gapless data rate of up to
166 MHz is possible depending on burst length,
CAS latency and speed grade of the device.
Device Usage Chart
Operating
Temperature
Range
Package Outline
Access Time (ns)
Power
Temperature
Mark
T
6
7
8PC
Std.
L
0
°
C to 70
°
C
Blank
相關PDF資料 |
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|---|---|
| V54C365324V | 200/183/166/143 MHz 3.3 VOLT ULTRA HIGH PERFORMANCE 2M X 32 SDRAM 4 BANKS X 512Kbit X 32 |
| V54C365404VB | High Performance PC100/125MHz 3.3 Volt 16M X 4 Synchronous DRAM(3.3V高性能PC100/125MHz 16Mx4同步動態(tài)RAM) |
| V54C365404VD | HIGH PERFORMANCE 143/133/125 MHz 3.3 VOLT 16M X 4 SYNCHRONOUS DRAM 4 BANKS X 4Mbit X 4 |
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| V54C365804VC | HIGH PERFORMANCE 143/133/125 MHz 3.3 VOLT 8M X 8 SYNCHRONOUS DRAM 4 BANKS X 2Mbit X 8 |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| V54C365324V | 制造商:MOSEL 制造商全稱:MOSEL 功能描述:200/183/166/143 MHz 3.3 VOLT ULTRA HIGH PERFORMANCE 2M X 32 SDRAM 4 BANKS X 512Kbit X 32 |
| V54C365404VD | 制造商:MOSEL 制造商全稱:MOSEL 功能描述:HIGH PERFORMANCE 143/133/125 MHz 3.3 VOLT 16M X 4 SYNCHRONOUS DRAM 4 BANKS X 4Mbit X 4 |
| V54C365804VC | 制造商:MOSEL 制造商全稱:MOSEL 功能描述:HIGH PERFORMANCE 143/133/125 MHz 3.3 VOLT 8M X 8 SYNCHRONOUS DRAM 4 BANKS X 2Mbit X 8 |
| V54C365804VD | 制造商:MOSEL 制造商全稱:MOSEL 功能描述:HIGH PERFORMANCE 143/133/125 MHz 3.3 VOLT 8M X 8 SYNCHRONOUS DRAM 4 BANKS X 2Mbit X 8 |
| V5-5/RK 4-0.3/0.3/0.3 | 制造商:TURCK Inc 功能描述:Cordset, Splitter, M12 Female Straight x 3, 4 Wire, 5m, PVC, Yellow, U0986-00 |
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