Preliminary Data Sheet
July 2001
Signal Processor
T8533/34 Quad Programmable Line Card
Agere Systems Inc.
23
Functional Description
(continued)
The Control Interface
(continued)
Write All Channels
The write all channels command causes all four channels to be loaded with the same coefficients with a single data
transfer from the master controller. This allows for a faster initialization of the device after a powerup. This com-
mand should be used with caution since it affects all four channels. The normal memory write and read commands
affect only one channel.
Reset Functionality
0071
Figure 19. Hardware Reset Procedure
The reset function allows the internal logic of the device to be set to a known initial condition, either externally by
activating the reset lead, or on a per-channel basis through the microprocessor interface by setting and then
clearing bits, if required, in address RESCTRL (address 128). These two reset functions have different effects, and
each of the software reset functions is a subset of the hardware reset functionality. The primary difference is in
the treatment of the internal memory. The hardware reset is assumed to be a result of a catastrophic hardware
event, such as a loss of power or an initial powerup. Accordingly, the assumption is made that the internal memory
does not contain valid data, and default values for all memory locations are loaded. A software reset, however, can
only be initiated if the device is operational (at least the microprocessor interface), so the contents of the memory
may indeed be valid; thus, the resets may be more specific. Additionally, software resets only affect the selected
channel.
FS
BCLK
RST
DCLK
(GAPPED)
DCLK
(CONTINUOUS)
≥
8 PULSES REQUIRED
DURING RESET
≥
12 PULSES REQUIRED
AFTER RESET
NO GAP IS REQUIRED HERE.
≥
8 PULSES REQUIRED
DURING RESET
≥
12 PULSES REQUIRED
AFTER RESET
DEVICE
CAN NOW BE PROGRAMMED
WAIT
≥
5 ms
RUNS CONTINUOUSLY
RUNS CONTINUOUSLY