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參數(shù)資料
| 型號： | UT62L25616BS-55LI |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | 256K X 16 BIT LOW POWER CMOS SRAM |
| 中文描述： | 256 × 16位低功耗CMOS SRAM |
| 文件頁數(shù)： | 5/12頁 |
| 文件大?。?/td> | 203K |
| 代理商： | UT62L25616BS-55LI |
UTRON
UT62L25616(I)
Rev. 1.1
256K X 16 BIT LOW POWER CMOS SRAM
TIMING WAVEFORMS
READ CYCLE 1
(Address Controlled)
(1,2,4)
UTRON TECHNOLOGY INC. P80054
1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.
TEL: 886-3-5777882 FAX: 886-3-5777919
5
t
RC
Address
DOUT
Data Valid
t
AA
t
OH
t
OH
READ CYCLE 2
(
CE
and
OE
Controlled)
(1,3,5,6)
t
RC
t
AA
t
ACE
t
BLZ
t
OE
t
CHZ
t
OHZ
t
CLZ
t
BHZ
t
OH
t
OLZ
HIGH-Z
Data Valid
HIGH-Z
Address
CE
LB , UB
OE
Dout
t
BA
Notes :
1.
WE
is HIGH for read cycle.
2. Device is continuously selected CE=V
IL.
3. Address must be valid prior to or coincident with CE transition; otherwise t
AA
is the limiting parameter.
4. OE is LOW.
5. t
CLZ
, t
OLZ
, t
CHZ
and t
OHZ
are specified with C
L
= 5pF. Transition is measured
±
500mV from steady state.
6. At any given temperature and voltage condition, t
CHZ
is less than t
CLZ
, t
OHZ
is less than t
OLZ.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| UT62L25616BS-55LLI | 256K X 16 BIT LOW POWER CMOS SRAM |
| UT62L25616BS-70LI | 256K X 16 BIT LOW POWER CMOS SRAM |
| UT62L25616BS-70LLI | 256K X 16 BIT LOW POWER CMOS SRAM |
| UT62L25616I | 256K X 16 BIT LOW POWER CMOS SRAM |
| UT62L25616MC-55LI | 256K X 16 BIT LOW POWER CMOS SRAM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| UT62L25616BS-55LLI | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:256K X 16 BIT LOW POWER CMOS SRAM |
| UT62L25616BS-70LI | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:256K X 16 BIT LOW POWER CMOS SRAM |
| UT62L25616BS-70LLI | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:256K X 16 BIT LOW POWER CMOS SRAM |
| UT62L25616I | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:256K X 16 BIT LOW POWER CMOS SRAM |
| UT62L25616MC-55LI | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:256K X 16 BIT LOW POWER CMOS SRAM |
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