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參數(shù)資料
| 型號： | UT62L25616BS-55LI |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | 256K X 16 BIT LOW POWER CMOS SRAM |
| 中文描述： | 256 × 16位低功耗CMOS SRAM |
| 文件頁數(shù)： | 4/12頁 |
| 文件大?。?/td> | 203K |
| 代理商： | UT62L25616BS-55LI |
UTRON
UT62L25616(I)
Rev. 1.1
256K X 16 BIT LOW POWER CMOS SRAM
CAPACITANCE
(TA=25
℃
, f=1.0MHz)
PARAMETER
SYMBOL
Input Capacitance
C
IN
Input/Output Capacitance
C
I/O
Note : These parameters are guaranteed by device characterization, but not production tested.
AC TEST CONDITIONS
Input Pulse Levels
Input Rise and Fall Times
Input and Output Timing Reference Levels
Output Load
AC ELECTRICAL CHARACTERISTICS
(VCC =2.7V~3.6V, TA = -40
℃
to 85
℃
(I))
(1) READ CYCLE
PARAMETER
SYMBOL UT62L25616(I)-55 UT62L25616(I)-70 UT62L25616(I)-100 UNIT
MIN.
Read Cycle Time
t
RC
55
Address Access Time
t
AA
-
Chip Enable Access Time
t
ACE
-
Output Enable Access Time
t
OE
-
Chip Enable to Output in Low Z
t
CLZ*
10
Output Enable to Output in Low Z
t
OLZ*
5
Chip Disable to Output in High Z
t
CHZ*
-
Output Disable to Output in High Z
t
OHZ*
-
Output Hold from Address Change
t
OH
5
LB
,
UB
Access Time
t
BA
-
LB
,
UB
to High-Z Output
t
HZB
-
LB
,
UB
to Low-Z Output
t
LZB
0
(2) WRITE CYCLE
PARAMETER
SYMBOL UT62L25616(I)-55 UT62L25616(I)-70 UT62L25616(I)-100 UNIT
MIN.
Write Cycle Time
t
WC
55
Address Valid to End of Write
t
AW
50
Chip Enable to End of Write
t
CW
50
Address Set-up Time
t
AS
0
Write Pulse Width
t
WP
45
Write Recovery Time
t
WR
0
Data to Write Time Overlap
t
DW
25
Data Hold from End of Write Time
t
DH
0
Output Active from End of Write
t
OW*
5
Write to Output in High Z
t
WHZ*
-
LB
,
UB
Valid to End of Write
t
BW
45
*These parameters are guaranteed by device characterization, but not production tested.
UTRON TECHNOLOGY INC. P80054
1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.
TEL: 886-3-5777882 FAX: 886-3-5777919
4
MIN.
-
-
MAX
6
8
UNIT
pF
pF
0V to 3.0V
5ns
1.5V
C
L
= 30pF, I
OH
/I
OL
= -1mA / 2.1mA
MAX.
-
55
55
30
-
-
20
20
-
55
25
-
MIN.
70
-
-
-
10
5
-
-
5
-
-
0
MAX.
-
70
70
35
-
-
25
25
-
70
30
-
MIN.
100
-
-
-
10
5
-
-
5
-
-
0
MAX.
-
100
100
50
-
-
30
30
-
100
40
-
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
MAX.
-
-
-
-
-
-
-
-
-
30
-
MIN.
70
60
60
0
55
0
30
0
5
-
60
MAX.
-
-
-
-
-
-
-
-
-
30
-
MIN.
100
80
80
0
70
0
40
0
5
-
80
MAX.
-
-
-
-
-
-
-
-
-
40
-
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| UT62L25616BS-55LLI | 256K X 16 BIT LOW POWER CMOS SRAM |
| UT62L25616BS-70LI | 256K X 16 BIT LOW POWER CMOS SRAM |
| UT62L25616BS-70LLI | 256K X 16 BIT LOW POWER CMOS SRAM |
| UT62L25616I | 256K X 16 BIT LOW POWER CMOS SRAM |
| UT62L25616MC-55LI | 256K X 16 BIT LOW POWER CMOS SRAM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| UT62L25616BS-55LLI | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:256K X 16 BIT LOW POWER CMOS SRAM |
| UT62L25616BS-70LI | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:256K X 16 BIT LOW POWER CMOS SRAM |
| UT62L25616BS-70LLI | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:256K X 16 BIT LOW POWER CMOS SRAM |
| UT62L25616I | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:256K X 16 BIT LOW POWER CMOS SRAM |
| UT62L25616MC-55LI | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:256K X 16 BIT LOW POWER CMOS SRAM |
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