
RTI-15
Legend for TYPE and ACTIVE fields:
TI = TTL input
TUI = TTL input (pull-up)
TDI = TTL input (pull-down)
TO = TTL output
TTO = Three-state TTL output
TTB = Three-state TTL bidirectional
[ ] - Values in parentheses indicate the initialized state of
output pin.
DATA BUS
NAME
PIN NUMBER
LCC
53
TYPE
ACTIVE
DESCRIPTION
PGA
A11
DATA I/O 15
TTB
--
Bit 15 (MSB) of the bidirectional Data
bus.
Bit 14 of the bidirectional Data bus.
Bit 13 of the bidirectional Data bus.
Bit 12 of the bidirectional Data bus.
Bit 11 of the bidirectional Data bus.
Bit 10 of the bidirectional Data bus.
Bit 9 of the bidirectional Data bus.
Bit 8 of the bidirectional Data bus.
Bit 7 of the bidirectional Data bus.
Bit 6 of the bidirectional Data bus.
Bit 5 of the bidirectional Data bus.
Bit 4 of the bidirectional Data bus.
Bit 3 of the bidirectional Data bus.
Bit 2 of the bidirectional Data bus.
Bit 1 of the bidirectional Data bus.
Bit 0 (LSB) of the bidirectional Data bus.
DATA I/O 14
DATA I/O 13
DATA I/O 12
DATA I/O 11
DATA I/O 10
DATA I/O 9
DATA I/O 8
DATA I/O 7
DATA I/O 6
DATA I/O 5
DATA I/O 4
DATA I/O 3
DATA I/O 2
DATA I/O 1
DATA I/O 0
55
57
59
61
63
65
66
67
68
69
70
71
72
73
74
A10
A9
A8
B6
C7
A6
A5
B5
C5
A4
B4
A3
A2
B3
A1
TTB
TTB
TTB
TTB
TTB
TTB
TTB
TTB
TTB
TTB
TTB
TTB
TTB
TTB
TTB
--
--
--
--
--
--
--
--
--
--
--
--
--
--
--
INPUT ADDRESS BUS
NAME
PIN NUMBER
LCC
75
77
79
81
83
1
3
5
7
9
13
TYPE
ACTIVE
DESCRIPTION
PGA
B2
B1
D2
F2
E1
F3
G1
G3
H2
K1
K3
ADDR IN 10
ADDR IN 9
ADDR IN 8
ADDR IN 7
ADDR IN 6
ADDR IN 5
ADDR IN 4
ADDR IN 3
ADDR IN 2
ADDR IN 1
ADDR IN 0
TI
TI
TI
TI
TI
TI
TI
TI
TI
TI
TI
--
--
--
--
--
--
--
--
--
--
--
Bit 10 (MSB) of the Address Input bus.
Bit 9 of the Address Input bus.
Bit 8 of the Address Input bus.
Bit 7 of the Address Input bus.
Bit 6 of the Address Input bus.
Bit 5 of the Address Input bus.
Bit 4 of the Address Input bus.
Bit 3 of the Address Input bus.
Bit 2 of the Address Input bus.
Bit 1 of the Address Input bus.
Bit 0 (LSB) of the Address Input bus.