參數(shù)資料
型號(hào)： uPSD3412C-24U6T
廠商： 意法半導(dǎo)體
英文描述： Flash Programmable System Devices with 8032 Microcontroller Core and 16Kbit SRAM
中文描述： 閃存可編程系統(tǒng)設(shè)備與8032微控制器核心和16Kbit SRAM的
文件頁數(shù)： 77/152頁
文件大小： 796K
代理商： UPSD3412C-24U6T
77/152
UPSD3212C, UPSD3212CV
Serial Status Register (S2STA)
S2STA is a “Read-only” register. The contents of
this register may be used as a vector to a service
routine. This optimized the response time of the
software and consequently that of the I
2
C bus. The
status codes for all possible modes of the I
2
C bus
interface are given Table 54.
This flag is set, and an interrupt is generated, after
any of the following events occur:
1. Own slave address has been received during
AA = 1: ack_int
2. The general call address has been received
while GC(S2ADR.0) = 1 and AA = 1:
3. A data byte has been received or transmitted in
Master Mode (even if arbitration is lost): ack_int
4. A data byte has been received or transmitted as
selected slave: ack_int
5. A stop condition is received as selected slave
receiver or transmitter: stop_int
Data Shift Register (S2DAT)
S2DAT contains the serial data to be transmitted
or data which has just been received. The MSB
(Bit 7) is transmitted or received first; that is, data
shifted from right to left.
Table 53. Serial Status Register (S2STA)
Table 54. Description of the S2STA Bits
Note: 1. Interrupt Flag Bit (INTR, S2STA Bit 5) is cleared by Hardware as reading S2STA register.
2. I
2
C Interrupt Flag (INTR) can occur in below case.
Table 55. Data Shift Register (S2DAT)
7
6
5
4
3
2
1
0
GC
STOP
INTR
TX_MODE
BBUSY
BLOST
/ACK_REP
SLV
Bit
Symbol
Function
7
GC
General Call Flag
6
STOP
Stop Flag. This bit is set when a STOP condition is received
5
INTR
(1,2)
Interrupt Flag. This bit is set when an I2C Interrupt condition is requested
4
TX_MODE
Transmission Mode Flag.
This bit is set when the I2C is a transmitter; otherwise this bit is reset
3
BBUSY
Bus Busy Flag.
This bit is set when the bus is being used by another master; otherwise, this bit is reset
2
BLOST
Bus Lost Flag.
This bit is set when the master loses the bus contention; otherwise this bit is reset
1
/ACK_REP
Acknowledge Response Flag.
This bit is set when the receiver transmits the not acknowledge signal
This bit is reset when the receiver transmits the acknowledge signal
0
SLV
Slave Mode Flag.
This bit is set when the I2C plays role in the Slave Mode; otherwise this bit is reset
7
6
5
4
3
2
1
0
S2DAT7
S2DAT6
S2DAT5
S2DAT4
S2DAT3
S2DAT2
S2DAT1
S2DAT0
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UPSD3422E-40T6 功能描述:8位微控制器 -MCU 8 BITS MICROCONTR RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
UPSD3422E-40U6 功能描述:8位微控制器 -MCU 8 BITS MICROCONTR RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
UPSD3422EB40T6 功能描述:8位微控制器 -MCU Turbo 8032 MCU w/USB & Programmable Logic RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
UPSD3422EB40U6 功能描述:8位微控制器 -MCU uPSD34x Turbo Plus Fast Turbo 8032 MCU RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
UPSD3422EV-40T6 功能描述:8位微控制器 -MCU 8 BITS MICROCONTR RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
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