參數(shù)資料
型號: UPD78F9201MA-CAC-A
廠商: Renesas Electronics America
文件頁數(shù): 50/158頁
文件大小: 0K
描述: MCU 8BIT 2KB FLASH 128B RAM
標準包裝: 400
系列: 78K0S/Kx1+
核心處理器: 78K0S
芯體尺寸: 8-位
速度: 10MHz
外圍設(shè)備: LVD,POR,PWM,WDT
輸入/輸出數(shù): 7
程序存儲器容量: 2KB(2K x 8)
程序存儲器類型: 閃存
RAM 容量: 128 x 8
電壓 - 電源 (Vcc/Vdd): 2 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 4x10b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 10-LSSOP(0.225",5.72mm 寬)
包裝: 托盤
CHAPTER 7 8-BIT TIMER H1
User’s Manual U18172EJ3V0UD
141
<4>
When 8-bit timer counter H1 and the CMP11 register match, TOH1 output becomes inactive and the
compare register to be compared with 8-bit timer counter H1 is changed from the CMP11 register to the
CMP01 register.
At this time, 8-bit timer counter H1 is not cleared and the INTTMH1 signal is not
generated.
<5>
By performing procedures <3> and <4> repeatedly, a pulse with an arbitrary duty can be obtained.
<6>
To stop the count operation, set TMHE1 = 0.
If the setting value of the CMP01 register is N, the setting value of the CMP11 register is M, and the count clock
frequency is fCNT, the PWM pulse output cycle and duty are as follows.
PWM pulse output cycle = (N+1)/fCNT
Duty = Active width : Total width of PWM = (M + 1) : (N + 1)
Cautions 1. In PWM output mode, the setting value for the CMP11 register can be changed during timer
count operation.
However, three operation clocks (signal selected using the CKS12 to
CKS10 bits of the TMHMD1 register) or more are required to transfer the register value after
rewriting the CMP11 register value.
2. Be sure to set the CMP11 register when starting the timer count operation (TMHE1 = 1) after
the timer count operation was stopped (TMHE1 = 0) (be sure to set again even if setting the
same value to the CMP11 register).
(2) Timing chart
The operation timing in PWM output mode is shown below.
Caution
Make sure that the CMP11 register setting value (M) and CMP01 register setting value (N) are
within the following range.
00H
≤ CMP11 (M) < CMP01 (N) ≤ FFH
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