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參數(shù)資料
| 型號(hào)： | UPD78C12AGQ |
| 廠商： | NEC Corp. |
| 英文描述： | 8-BIT SINGLE-CHIP MICROCOMPUTER WITH A/D CONVERTER |
| 中文描述： | 8位單片機(jī)與A / D轉(zhuǎn)換 |
| 文件頁(yè)數(shù)： | 18/66頁(yè) |
| 文件大?。?/td> | 3252K |
| 代理商： | UPD78C12AGQ |
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18
μ
PD78C10A,78C11A,78C12A
FFH
0
Undefined
Timer mode register (TMM)
Timer
Timer F/F
Timer register (TM0, TM1)
Timer/event counter mode register (ETMM)
Timer/event counter output mode register (EOM)
Timer/event counter Timer/event counter register (ETM0, ETM1)
Timer/event counter capture register (ECPT)
Timer/event counter (ECNT)
Serial mode high register (SMH)
Serial mode low register (SML)
A/D channel mode register (ANM)
MM register (MM3; RAE bit)
Zero cross mode register (ZC1, ZC2 bits)
Table 3-1 State of Each Hardware after Reset
Expansion accumulator (EA, EA')
Accumulator (A, A')
General register (B, C, D, E, H, L, B', C', D', E', H', L')
Working register vector register (V, V')
Program counter (PC)
Stack pointer (SP)
Mode register (MA, MB, MC, MF)
Port
MCC register
MM register (bits MM0 to MM2)
Output latch of each port
INTERRUPT ENABLE F/F
Interrupt
Request flag
Mask register
Test flag (except SB flag)
Power-on reset
Standby flag (SB)
Standby mode
Hardware
Reset input during normal operation
Internal data
memory
0000H
Undefined
FFH
00H
0
Undefined
0
0
FFH
0
1
Previous contents held.
Contents immediately before
RESET input held
00H
Undefined
00H
48H
00H
Undefined
1
Undefined
Serial interface
State after Reset
Reset input
during normal
operation
Reset input in standby mode
Writing
by CPU
Write address data
Address data other than the aboove
Power-on reset
Previous contents held.
Undefined
Previous contents held.
Operation other than writing by CPU
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