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參數(shù)資料
| 型號(hào)： | UPD77210 |
| 廠商： | NEC Corp. |
| 元件分類： | 數(shù)字信號(hào)處理 |
| 英文描述： | 16-BIT FIXED-POINT DIGITAL SIGNAL PROCESSOR |
| 中文描述： | 16位定點(diǎn)數(shù)字信號(hào)處理器 |
| 文件頁數(shù)： | 30/74頁 |
| 文件大?。?/td> | 467K |
| 代理商： | UPD77210 |
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Data Sheet U15203EJ3V0DS
30
μ
PD77210, 77213
5.2.2 Host reboot
The instruction code is obtained via the host interface and transferred to the instruction RAM.
The entry address is 0x5. Host rebooting is executed by setting the following parameters and then calling this
address.
R7L: Number of instruction steps to be rebooted
R6L: Host status register (HST)
DP2: Transfer destination address of instruction to be rebooted (offset 0x8000 in the case of internal instruction
RAM area)
R5L: Transfer destination data page register (DPR) (Specify 0x80 of the internal instruction RAM area.)
5.2.3 Serial reboot
The instruction code is obtained via the serial interface (TDMSIO) and then transferred to the instruction RAM.
The entry address is 0x6. Host rebooting is executed by setting the following parameters and then calling this
address.
R7L: Number of instruction steps to be rebooted
R6L: Serial status register (SST) (Specify 0x0EC0.)
DP2: Transfer destination address of instruction to be rebooted (offset 0x8000 in the case of internal instruction
RAM area)
R5L: Transfer destination data page register (DPR) (Specify 0x80 of the internal instruction RAM area.)
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