參數(shù)資料
型號(hào)： UPD754264
廠商： NEC Corp.
英文描述： 4-BIT SINGLE-CHIP MICROCONTROLLERS
中文描述： 4位單晶片微控制器
文件頁數(shù)： 53/68頁
文件大?。?/td> 318K
代理商： UPD754264
53
μ
PD754264
Data Memory STOP Mode Low-Supply Voltage Data Retention Characteristics (T
A
= –40 to +85
°
C)
Parameter
Symbol
Test Conditions
MIN.
TYP.
MAX.
Unit
Release signal set time
t
SREL
0
μ
s
Oscillation stabilization
wait time
Note 1
t
WAIT
Release by RESET
Note 2
ms
Release by interrupt request
Note 3
ms
Notes 1.
The oscillation stabilization wait time is the time during which the CPU operation is stopped to
avoid unstable operation at oscillation start.
2.
Any of 2
17
/f
X
, 2
15
/f
X
or 2
13
/f
X
can be selected with mask option.
3.
Depends on setting of basic interval timer mode register (BTM) (see table below).
BTM3
BTM2
BTM1
BTM0
Wait Time
When fX = 4.19 MHz
When fX = 6.0 MHz
–
0
0
0
2
20
/fX (Approx. 250 ms)
2
20
/fX (Approx. 175 ms)
–
0
1
1
2
17
/fX (Approx. 31.3 ms)
2
17
/fX (Approx. 21.8 ms)
–
1
0
1
2
15
/fX (Approx. 7.81 ms)
2
15
/fX (Approx. 5.46 ms)
–
1
1
1
2
13
/fX (Approx. 1.95 ms)
2
13
/fX (Approx. 1.37 ms)
Interrupt Input Timing
RESET Input Timing
INT0, KR4 to KR7
t
INTL
t
INTH
RESET
t
RSL
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