參數(shù)資料
型號： UPD753016GK-XXX-BE9
廠商： NEC Corp.
英文描述： MICROCONTROLLER|4-BIT|UPD75XL CPU|CMOS|TQFP|80PIN|PLASTIC
中文描述： 單片機| 4位| UPD75XL的CPU |的CMOS | TQFP封裝| 80腳|塑料
文件頁數(shù)： 39/80頁
文件大?。?/td> 569K
代理商： UPD753016GK-XXX-BE9
39
μ
PD753012, 753016, 753017
9. RESET FUNCTION
There are two reset inputs: external reset signal (RESET) and reset signal sent from the basic interval timer/
watchdog timer. When either one of the reset signals are input, an internal reset signal is generated. Figure 9-
1 shows the circuit diagram of the above two inputs.
Figure 9-1. Configuration of Reset Function
RESET
Internal reset signal
Reset signal sent from the basic
interval timer/watchdog timer
WDTM
Internal bus
The
μ
PD753017 is set by the RESET signal generated and each device is initialized as listed in Table 9-1.
Figure 9-2 shows the timing chart of the reset operation.
Figure 9-2. Reset Operation by RESET Signal Generation
Operation mode or
standby mode
Wait
Note
RESET
signal
generated
Operation mode
HALT mode
Internal reset operation
Note
The following two times can be selected by the mask option.
2
17
/f
X
(21.8 ms : at 6.00 MHz operation, 31.3 ms : at 4.19 MHz operation)
2
15
/f
X
(5.46 ms : at 6.00 MHz operation, 7.81 ms : at 4.19 MHz operation)
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