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參數(shù)資料
| 型號(hào)： | UPD75104GF |
| 廠商： | NEC Corp. |
| 英文描述： | 4-BIT SINGLE-CHIP MICROCOMPUTER |
| 中文描述： | 4位單片機(jī) |
| 文件頁(yè)數(shù)： | 15/70頁(yè) |
| 文件大?。?/td> | 535K |
| 代理商： | UPD75104GF |
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μ
PD75104, 75106, 75108
15
(a)
μ
PD75108
7
6
5
MBE RBE
0
MBE RBE
0
MBE RBE
0
MBE RBE
0
MBE RBE
0
MBE RBE
0
Internal reset start address (upper 5 bits)
Internal reset start address (lower 8 bits)
INTBT/INT4 start address (upper 5 bits)
INTBT/INT4 start address (lower 8 bits)
INT0/INT1 start address (upper 5 bits)
INT0/INT1 start address (lower 8 bits)
INTSIO start address (upper 5 bits)
INTSIO start address (lower 8 bits)
INTT0 start address (upper 5 bits)
INTT0 start address (lower 8 bits)
INTT1 start address (upper 5 bits)
INTT1 start address (lower 8 bits)
0000H
0002H
0004H
0006H
0008H
000AH
0020H
007FH
0080H
07FFH
0800H
0FFFH
1000H
1F7FH
GETI instruction reference table
0
BRCB
! caddr
instruction
branch
address
CALLF
! faddr
instruction
entry
address
BR ! addr
instruction
branch address
CALL ! addr
instruction
subroutine
entry address
BR $addr
instruction
relational
branch address
(–15 to –1,
+2 to +16)
Branch destination
address and
subroutine entry
address for
GETI instruction
Address
BRCB ! caddr
instruction
branch address
Remarks:
In addition to the above addresses, program can be branched to addresses specified by the PC
with the contents of its lower 8 bits changed by BR PCDE or BR PCXA instruction.
Fig. 4-1 Program Memory Map (1/3)
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| UPD75108F | 4-BIT SINGLE-CHIP MICROCOMPUTER |
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