參數(shù)資料
型號(hào)： UPD72042A
廠商： NEC Corp.
英文描述： LSI DEVICES FOR Inter Equipment BusTM (IEBusTM) PROTOCOL CONTROL
中文描述： LSI器件間設(shè)備BusTM（IEBusTM）協(xié)議控制
文件頁(yè)數(shù)： 87/92頁(yè)
文件大小： 541K
代理商： UPD72042A
μ
PD72042A, 72042B
87
DATA SHEET S13990EJ2V0DS00
Circuit connected to IEBus
Remark
Protective resistor
Terminating resistor
Load capacitor
R
S
= 180
±
5 %
R
L
= 120
±
5 %
C
g
Please use the capacitor on the bus line under the capacitance shown in the table below.
System clock (f
X
)
Maximum capacitance between
the Bus+ pin and Bus– pin
6 MHz
8000 pF
6.29 MHz
7100 pF
Therefore, the total load capacitance C
T
between the Bus+ pin and Bus– pin is as follows.
C
T
=
N
1
Σ
2
C
g
+ C
W
C
W
: Wiring capacitance
Cautions 1. The circuit constants in the above figure are applied when each unit connected to the IEBus
line uses the
μ
PD72042A and
μ
PD72042B.
2. The load capacitor connected to the bus line should be located closer to the IEBus than to
the protective resistor, as shown in the figure above.
3. Do not insert inductive parts into the bus line.
μ
PD72042A,
Bus
+
R
S
R
S
C
g
C
g
R
L
R
L
Bus
μ
PD72042B
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