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參數(shù)資料
| 型號： | uPD70F3102GJ-33-8EU |
| 廠商： | NEC Corp. |
| 英文描述： | 32-/16-BIT SINGLE-CHIP MICROCONTROLLER |
| 中文描述： | 32-/16-BIT單片機(jī) |
| 文件頁數(shù)： | 58/82頁 |
| 文件大?。?/td> | 476K |
| 代理商： | UPD70F3102GJ-33-8EU |
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Preliminary Data Sheet U13844EJ2V0DS00
58
μ
PD70F3102-33
(g) DMA flyby transfer timing (DRAM (EDO, high-speed page)
→
external I/O transfer) (1/3)
Parameter
Symbol
Conditions
MIN.
MAX.
Unit
WAIT setup time (to CLKOUT
↓
)
<24>
t
SWK
15
ns
WAIT hold time (from CLKOUT
↓
)
<25>
t
HKW
2
ns
Delay time from OE
↑
to data output
<37>
t
DRDOD
(0.5 + i) T – 10
ns
Delay time from address to IOWR
↓
<41>
t
DAWR
(0.5 + w
RP
) T – 10
ns
Address setup time (to IOWR
↑
)
<42>
t
SAWR
(2 + w
RP
+ w
RH
+ w
DA
+ w) T –10
ns
Delay time from IOWR
↑
to address
<43>
t
DWRA
0.5T – 10
ns
w
F
= 0
0
ns
Delay time from IOWR
↑
to RD
↑
<48>
t
DWRRD
w
F
= 1
T – 10
ns
IOWR low-level width
<50>
t
WWRL
(2 + w
RH
+ w
DA
+ w) T – 10
ns
Row address setup time
<56>
t
ASR
(0.5 + w
RP
) T – 10
ns
Row address hold time
<57>
t
RAH
(0.5 + w
RH
) T – 10
ns
Column address setup time
<58>
t
ASC
0.5T – 10
ns
Column address hold time
<59>
t
CAH
(1.5 + w
DA
+ w
F
+ w) T – 10
ns
Read/write cycle time
<60>
t
RC
(3 + w
RP
+ w
RH
+ w
DA
+ w
F
+
w) T – 10
ns
RAS precharge time
<61>
t
RP
(0.5 + w
RP
) T – 10
ns
RAS hold time
<63>
t
RSH
(1.5 + w
DA
+ w
F
+ w) T – 10
ns
Column address read time for RAS
<64>
t
RAL
(2 + w
CP
+ w
DA
+ w
F
+ w) T – 10
ns
CAS pulse width
<65>
t
CAS
(1 + w
DA
+ w
F
+ w) T – 10
ns
CAS to RAS precharge time
<66>
t
CRP
(1 + w
RP
) T –10
ns
CAS hold time
<67>
t
CSH
(2 + w
RH
+ w
DA
+ w
F
+ w) T – 10
ns
WE setup time (to CAS
↓
)
<68>
t
RCS
(2 + w
RP
+ w
RH
) T – 10
ns
WE hold time (from RAS
↑
)
<69>
t
RRH
0.5T – 10
ns
WE hold time (from CAS
↑
)
<70>
t
RCH
1.5T – 10
ns
CAS precharge time
<71>
t
CPN
(2 + w
RP
+ w
RH
) T – 10
ns
RAS column address delay time
<76>
t
RAD
(0.5 + w
RH
) T – 10
ns
RAS to CAS delay time
<77>
t
RCD
(1 + w
RH
) T – 10
ns
Remarks 1.
T = t
CYK
2.
w: Number of waits due to WAIT
3.
w
RP
: Number of waits specified by RPCxx bit of register DRCn (n = 0 to 3, xx = 00 to 03, 10 to 13)
4.
w
RH
: Number of waits specified by RHCxx bit of register DRCn (n = 0 to 3, xx = 00 to 03, 10 to 13)
5.
w
DA
: Number of waits specified by DACxx bit of register DRCn (n = 0 to 3, xx = 00 to 03, 10 to 13)
6.
w
CP
: Number of waits specified by CPCxx bit of register DRCn (n = 0 to 3, xx = 00 to 03, 10 to 13)
7.
w
F
: Number of waits inserted to source-side access during DMA flyby transfer
8.
i: Number of idle states inserted when a write cycle follows the read cycle.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| UPD70F3102-33 | 32-/16-BIT SINGLE-CHIP MICROCONTROLLER |
| uPD70F3102GJ-33-UEN | 32-/16-BIT SINGLE-CHIP MICROCONTROLLER |
| UPD71054 | MOS INTEGRATED CIRCUIT |
| UPD71054L | MOS INTEGRATED CIRCUIT |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| UPD70F3102GJ33-8EU-A | 制造商:Renesas Electronics Corporation 功能描述: |
| UPD70F3102GJ-33-UEN | 制造商:NEC 制造商全稱:NEC 功能描述:32-/16-BIT SINGLE-CHIP MICROCONTROLLER |
| UPD70F3102GJ-A33-8EU | 制造商:World Products 功能描述: |
| UPD70F3107A | 制造商:NEC 制造商全稱:NEC 功能描述:32-Bit Single-Chip Microcontrollers |
| UPD70F3107AA | 制造商:NEC 制造商全稱:NEC 功能描述:32-Bit Single-Chip Microcontrollers |
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