參數(shù)資料
型號: UPD705102GM-133-8ED
廠商: NEC Corp.
英文描述: V832TM 32-BIT MICROPROCESSOR
中文描述: V832TM 32位微處理器
文件頁數(shù): 69/80頁
文件大小: 536K
代理商: UPD705102GM-133-8ED
μ
PD705102
69
Data Sheet U13675EJ2V1DS00
(6) Interrupt timing
Parameter
Symbol
<38> t
SNK
Conditions
MIN.
5
MAX.
Unit
ns
NMI setup time (to CLKOUT
)
NMI hold time (from CLKOUT
)
<39> t
HKN
7
ns
INTP
××
setup time (to CLKOUT
)
<40> t
SIK
7
ns
INTP
××
hold time (from CLKOUT
)
<41> t
HKI
3
ns
NMI high-level time
<42> t
NMH
5T + 12
ns
NMI low-level time
<43> t
NML
5T + 12
ns
Remarks 1.
T = t
CYK
(external clock cycle)
2.
Even if t
SNK
and t
HKN
are set to other than the above range, the NMI interrupt can be acknowledged,
however, in this case NMI acknowledge timing may be delayed.
<38>
<39>
<39> <38>
<42>
<43>
<40>
<41>
CLKOUT (output)
NMI (input)
2.0 V
0.6 V
0.5 V
INTP00 to INTP03,
INTP10 to INTP13 (input)
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