- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄378740 > UPD65549 CMOS Gate Array.Embedded Array Ver.2.0 for Package | Design Manual[05/2003] PDF資料下載
參數(shù)資料
| 型號： | UPD65549 |
| 英文描述： | CMOS Gate Array.Embedded Array Ver.2.0 for Package | Design Manual[05/2003] |
| 中文描述： | CMOS門陣列Array.Embedded的包版本2.0 |設(shè)計手冊[05/2003] |
| 文件頁數(shù)： | 42/64頁 |
| 文件大?。?/td> | 399K |
| 代理商： | UPD65549 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁當(dāng)前第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁
42
μ
PD64A, 65
Data Sheet U14380EJ2V0DS00
9.7 Branch Instructions
The program memory consists of pages in steps of 1K (000H to 3FFH). However, as the assembler automatically
performs page optimization, it is unnecessary to designate pages. The pages allowed for each product are as
follows.
μ
PD64A (ROM: 1K steps)
μ
PD65 (ROM: 2K steps)
μ
PD6P5 (PROM: 2K steps) : pages 0, 1
: page 0
: pages 0, 1
JMP addr
<1> Instruction code
: page 0
0 1 0 0 0 1 0 0 0 1
; page 1
0 1 0 0 1 1 0 0 0 1
a
9
a
7
a
6
a
5
a
4
a
8
a
3
a
2
a
1
a
0
: 1
: PC
←
addr
<2> Cycle count
<3> Function
The 10 bits (PC
9-0
) of the program counter are replaced directly by the specified address addr (a
9
to
a
0
).
JC addr
<1> Instruction code
: page 0
0 1 1 0 0 1 0 0 0 1
; page 1
0 1 0 1 0 1 0 0 0 1
a
9
a
7
a
6
a
5
a
4
a
8
a
3
a
2
a
1
a
0
: 1
: if
CY = 1
else
PC
←
PC + 2
<2> Cycle count
<3> Function
PC
←
addr
If the carry flag CY is set (to 1), a jump is made to the address specified with addr (a
9
to a
0
).
JNC addr
<1> Instruction code
: page 0
0 1 1 0 1 1 0 0 0 1
; page 1
0 1 0 1 1 1 0 0 0 1
a
9
a
7
a
6
a
5
a
4
a
8
a
3
a
2
a
1
a
0
: 1
: if
CY = 0
else
PC
←
PC + 2
<2> Cycle count
<3> Function
PC
←
addr
If the carry flag CY is cleared (to 0), a jump is made to the address specified with addr (a9 to a0).
JF addr
<1> Instruction code
: page 0
0 1 1 1 0 1 0 0 0 1
; page 1
1 0 0 0 0 1 0 0 0 1
a
9
a
7
a
6
a
5
a
4
a
8
a
3
a
2
a
1
a
0
: 1
: if
F = 1
else
PC
←
PC + 2
<2> Cycle count
<3> Function
PC
←
addr
If the status flag F is set (to 1), a jump is made to the address specified with addr (a
9
to a
0
).
JNF addr
<1> Instruction code
: page 0
0 1 1 1 1 1 0 0 0 1
; page 1
1 0 0 0 1 1 0 0 0 1
a
9
a
7
a
6
a
5
a
4
a
8
a
3
a
2
a
1
a
0
: 1
: if
F = 0
else
PC
←
PC + 2
<2> Cycle count
<3> Function
PC
←
addr
If the status flag F is cleared (to 0), a jump is made to the address specified with addr (a
9
to a
0
).
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| UPD65550 | CMOS-10HD Family Pamphlet | Pamphlet[07/2003] |
| UPD65551 | CMOS Gate Array.Embedded Array Ver.2.0 for Package | Design Manual[05/2003] |
| UPD65564 | CMOS-10HD Family Pamphlet | Pamphlet[07/2003] |
| UPD65565 | ANACONDA LT TRANSCEIVER |
| UPD65566 | CMOS-10HD Family Pamphlet | Pamphlet[07/2003] |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| UPD65550 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:CMOS-10HD Family Pamphlet | Pamphlet[07/2003] |
| UPD65551 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:CMOS Gate Array.Embedded Array Ver.2.0 for Package | Design Manual[05/2003] |
| UPD65564 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:CMOS-10HD Family Pamphlet | Pamphlet[07/2003] |
| UPD65565 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:CMOS Gate Array.Embedded Array Ver.2.0 for Package | Design Manual[05/2003] |
| UPD65566 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:CMOS-10HD Family Pamphlet | Pamphlet[07/2003] |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。