參數(shù)資料
型號: UPD6451A
英文描述: UPD6451A Data Sheet | Data Sheet[12/1995]
中文描述: UPD6451A數(shù)據(jù)表|數(shù)據(jù)表[12/1995]
文件頁數(shù): 36/68頁
文件大?。?/td> 301K
代理商: UPD6451A
36
μ
PD63, 63A, 64
9.4 Accumulator Operation Instructions
ANL A, R0n
ANL A, R1n
<1> Instruction code
<2> Cycle count
<3> Function
:
1 1 0 1 R
4
0 R
3
R
2
R
1
R
0
: 1
: (A)
(A)
CY
A
3
Rmn
3
(Rmn)
m = 0, 1
n = 0 to F
The accumulator contents and the register Rmn contents are ANDed and the results are entered in the
accumulator.
ANL A, @R0H
ANL A, @R0L
<1> Instruction code
<2> Cycle count
<3> Function
:
1 1 0 1 0/1 1 0 0 0 0
: 1
: (A)
(A)
CY
A
3
ROM
7
(A)
(A)
CY
A
3
ROM
3
((P13), (R0))
7-4
(in the case of ANL A, @R0H)
((P13), (R0))
3-0
(in the case of ANL A, @R0L)
The accumulator contents and the program memory contents specified with the control register P13 and
register pair R
10
-R
00
are ANDed and the results are entered in the accumulator.
If H is specified, b
7
, b
6
, b
5
and b
4
take effect. If L is specified, b
3
, b
2
, b
1
and b
0
take effect.
Program memory (ROM) organization
b
9
b
8
b
7
b
6
b
5
b
4
b
3
b
2
b
1
b
0
H
L
Valid bits at the time of accumulator operation
ANL A, #data4
<1> Instruction code
:
1 1 0 1 1 1 0 0 0 1
0 0 0 0 0 0 d
3
d
2
d
1
d
0
: 1
: (A)
(A)
CY
A
3
data4
3
<2> Cycle count
<3> Function
data4
The accumulator contents and the immediate data are ANDed and the results are entered in the
accumulator.
相關(guān)PDF資料
PDF描述
UPD6451ACX-001 On-Screen Display Circuit
UPD6451AGT-101 On-Screen Display Circuit
UPD6451AGT-301 On-Screen Display Circuit
UPD6452CS-002 On-Screen Display Circuit
UPD6452GT-102 On-Screen Display Circuit
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
UPD6451ACX-001 制造商:未知廠家 制造商全稱:未知廠家 功能描述:On-Screen Display Circuit
UPD6451AG821 制造商:Panasonic Industrial Company 功能描述:IC
UPD6451AG822 制造商:Panasonic Industrial Company 功能描述:IC
UPD6451AGT-101 制造商:NEC 制造商全稱:NEC 功能描述:MOS INTEGRATED CIRCUIT CMOS LSI FOR 12lines X 24 columns CHARACTER DISPLAY ON SCREEN
UPD6451AGT-301 制造商:未知廠家 制造商全稱:未知廠家 功能描述:On-Screen Display Circuit