參數(shù)資料
型號(hào)： UPD46128512-E12X
廠商： NEC Corp.
英文描述： 128M-BIT CMOS MOBILE SPECIFIED RAM 8M-WORD BY 16-BIT EXTENDED TEMPERATURE OPERATION
中文描述： 128兆位CMOS移動(dòng)指明內(nèi)存800萬字由16位溫度范圍
文件頁數(shù)： 51/82頁
文件大小： 817K
代理商： UPD46128512-E12X
Preliminary Data Sheet M17507EJ2V0DS
51
μ
PD46128512-X
Figure 7-19. Asynchronous Write Cycle Timing Chart 9 (/LB, /UB Independent Controlled 3)
High-Z
High-Z
High-Z
High-Z
t
WC
t
AS
t
WC
A1
A2
A3
t
WR
t
DW
t
DH
t
DW
t
DH
t
WP
t
ASO
t
OHAH
t
OES
t
OEH
t
AS
t
WR
t
WHP1
t
WP
t
BS
t
BH
t
BH
t
BS
/CE1 (Input)
Address (Input)
DQ0 to DQ7 (Input)
/WE (Input)
/LB (Input)
/UB (Input)
DQ8 to DQ15 (Input)
/OE (Input)
L
Data In D2
Data In D1
Cautions 1. During address transition, at least one of pins /CE1 and /WE, or both of /LB and /UB pins should
be inactivated.
2. Do not input data to the DQ pins while they are in the output state.
3. In write cycle, CE2 and /OE should be fixed HIGH.
4. /ADV should be fixed LOW or toggled HIGH
→
LOW
→
HIGH. CLK should be fixed HIGH or LOW.
Remark
Write operation is done during the overlap time of LOW of following signals.
/CE1
/WE
/LB and/or /UB
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